Paul W Sucro

US Patent:

20120128229, May 24, 2012

Filed:

Nov 10, 2011

Appl. No.:

13/293727

Inventors:

Paul W. Sucro - Hatfield PA, US
Zhijie Wang - Chalfont PA, US
Deepak Sood - New Britain PA, US
Peter M. Lister - Warrington PA, US

Assignee:

KULICKE AND SOFFA INDUSTRIES, INC. - Fort Washington PA

International Classification:

G06K 9/00

US Classification:

382145

Abstract:

A method of imaging a feature of a semiconductor device is provided. The method includes the steps of: (a) imaging a first portion of a semiconductor device to form a first imaged portion; (b) imaging a subsequent portion of the semiconductor device to form a subsequent imaged portion; (c) adding the subsequent imaged portion to the first imaged portion to form a combined imaged portion; and (d) comparing the combined imaged portion to a reference image of a feature to determine a level of correlation of the combined imaged portion to the reference image.

US Patent:

20120065761, Mar 15, 2012

Filed:

May 17, 2010

Appl. No.:

13/321017

Inventors:

Ivy Wei Qin - Lansdale PA, US
Ray L. Cathcart - Elkins Park PA, US
Cuong Huynh - Radnor PA, US
Deepak Sood - New Britain PA, US
Paul W. Sucro - Hatfield PA, US
Joseph O. DeAngelo - Winters CA, US

Assignee:

KULICKE AND SOFFA INDUSTRIES, INC. - Fort Washington PA

International Classification:

G06F 17/00

US Classification:

700103, 700108

Abstract:

A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).

US Patent:

20190295983, Sep 26, 2019

Filed:

Jun 13, 2019

Appl. No.:

16/439923

Inventors:

- Fort Washington PA, US
Ray L. Cathcart - New York NY, US
Cuong Huynh - Radnor PA, US
Deepak Sood - New Britain PA, US
Paul W. Sucro - Hatfield PA, US
Joseph O. DeAngelo - Winters CA, US

International Classification:

H01L 23/00
B23K 20/00
H01L 21/66

Abstract:

A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).

US Patent:

20170033077, Feb 2, 2017

Filed:

Oct 11, 2016

Appl. No.:

15/290413

Inventors:

- Fort Washington PA, US
Ray L. Cathcart - New York NY, US
Cuong Huynh - Radnor PA, US
Deepak Sood - New Britain PA, US
Paul W. Sucro - Hatfield PA, US
Joseph O. DeAngelo - Winters CA, US

International Classification:

H01L 23/00
B23K 20/00
H01L 21/66

Abstract:

A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).