Pedro I Ovalle

US Patent:

7010713, Mar 7, 2006

Filed:

Jan 27, 2003

Appl. No.:

10/352372

Inventors:

Alan Roth - Austin TX, US
Oswald Becca - Roundrock TX, US
Pedro Ovalle - Austin TX, US

Assignee:

MOSAID Technologies, Inc. - Kanata

International Classification:

G06F 1/12
G06F 1/06

US Classification:

713400, 713600

Abstract:

A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second transparent latch receives data from the first transparent latch and outputs data dependent on a delayed output clock which is the output clock delayed by an insertion delay. An output latch receives data from the second transparent latch and synchronizes data to the output clock.

US Patent:

7596710, Sep 29, 2009

Filed:

Dec 14, 2005

Appl. No.:

11/305433

Inventors:

Alan Roth - Austin TX, US
Oswald Becca - Roundrock TX, US
Pedro Ovalle - Austin TX, US

Assignee:

MOSAID Technologies Incorporated - Ottawa

International Classification:

G06F 1/12
G06F 1/06

US Classification:

713400, 713600

Abstract:

A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second transparent latch receives data from the first transparent latch and outputs data dependent on a delayed output clock which is the output clock delayed by an insertion delay. An output latch receives data from the second transparent latch and synchronizes data to the output clock.

US Patent:

8069363, Nov 29, 2011

Filed:

Aug 19, 2009

Appl. No.:

12/543839

Inventors:

Alan Roth - Austin TX, US
Oswald Becca - Roundrock TX, US
Pedro Ovalle - Austin TX, US

Assignee:

Mosaid Technologies Incorporated - Ottawa, Ontario

International Classification:

G06F 1/12
H03L 7/00

US Classification:

713400, 327153, 36523313

Abstract:

A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second transparent latch receives data from the first transparent latch and outputs data dependent on a delayed output clock which is the output clock delayed by an insertion delay. An output latch receives data from the second transparent latch and synchronizes data to the output clock.

US Patent:

8296598, Oct 23, 2012

Filed:

May 23, 2011

Appl. No.:

13/113550

Inventors:

Alan Roth - Austin TX, US
Oswald Becca - Roundrock TX, US
Pedro Ovalle - Austin TX, US

Assignee:

Mosaid Technologies Incorporated - Ottawa, Ontario

International Classification:

G06F 1/12
H03L 7/00

US Classification:

713600, 713400, 36523313

Abstract:

A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second transparent latch receives data from the first transparent latch and outputs data dependent on a delayed output clock which is the output clock delayed by an insertion delay. An output latch receives data from the second transparent latch and synchronizes data to the output clock.

US Patent:

8533522, Sep 10, 2013

Filed:

Sep 21, 2012

Appl. No.:

13/624487

Inventors:

- Ottawa, CA
Oswald Becca - Roundrock TX, US
Pedro Ovalle - Austin TX, US

Assignee:

MOSAID Technologies Incorporated - Ottawa, Ontario

International Classification:

G06F 1/12

US Classification:

713600, 713400

Abstract:

A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second transparent latch receives data from the first transparent latch and outputs data dependent on a delayed output clock which is the output clock delayed by an insertion delay. An output latch receives data from the second transparent latch and synchronizes data to the output clock.

US Patent:

63136643, Nov 6, 2001

Filed:

Mar 20, 2000

Appl. No.:

9/528857

Inventors:

Geoffrey B. Hall - Austin TX
Pedro Ovalle - Austin TX
Dzung T. Tran - Austin TX

Assignee:

Motorola Inc. - Schaumburg IL

International Classification:

H03K 190185

US Classification:

326 83

Abstract:

A primary driver is activated to drive an output signal in response to an input signal. A reference signal is generated in response to the input signal. The output signal is compared to the reference signal. When the output signal lags the reference signal by a predefined amount an auxiliary driver is activated.