Peter E George

US Patent:

41006089, Jul 11, 1978

Filed:

Feb 28, 1977

Appl. No.:

5/773101

Inventors:

Peter K. George - San Jose CA

Assignee:

Rockwell International Corporation - El Segundo CA

International Classification:

G11C 1908

US Classification:

365 2

Abstract:

There is provided a memory system, for example, a magnetic bubble domain memory, which includes an exchange stack buffer memory between a main storage area and other portions of a bubble domain chip organization. The buffer memory includes a plurality of magnetic areas, such as discs, arranged in an ordered array between the main storage area and the remainder of the chip organization. Control conductors are arranged to interconnect each row of magnetic areas with an adjacent row of similar areas, or with portions of the main storage area, or with the remainder of the chip organization circuit. Means are provided to supply signals to the control conductors to selectively transfer information from a row of magnetic areas to one of the adjacent areas.

US Patent:

48977497, Jan 30, 1990

Filed:

Mar 16, 1988

Appl. No.:

7/168820

Inventors:

Craig M. Perlov - Los Altos CA
Peter K. George - Bloomington MN
Mark Jursich - Prior Lake MN

Assignee:

Magnetic Peripherals Inc. - Minnetonka MN

International Classification:

G11B 5127
G11B 5187

US Classification:

360126

Abstract:

A vertically recording write probe and read ring head. A ring pole is mounted adjacent a vertical recording probe pole. The ring pole tip is made thin such that it saturates on write and does not affect performance of the probe pole. The ring pole tip is separated from the probe tip by a small read gap. The probe pole and ring pole are connected in a back gap region so that the combination reads like a conventional read head.

US Patent:

42285224, Oct 14, 1980

Filed:

Jan 15, 1979

Appl. No.:

6/003651

Inventors:

Peter K. George - Santa Clara CA

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G11C 1908

US Classification:

365 15

Abstract:

Disclosed is a magnetic bubble memory that includes a plurality of minor loops for storing bubbles representative of data therein, and a pair of minor loops for storing bubbles representative of an error map therein. The error map is selectively written into and read from only one loop of the pair. The other loop is redundant and improves chip yield. A serial-parallel bubble propagation path connects all of the loops to a bubble generator. This path includes a predetermined number of bubble propagation elements between the transfer-in gates for the pair of loops. Proper choice of the number of propagation elements enables the error map to be selectively written into/read from only one loop of the pair with only a single control line.