Peter Fan-Chi Lai

age ~64

from San Jose, CA

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Also known as:
  • Peter Fan Chi Lai
  • Peter F Lai
  • Peter Chi Lai
  • Peter Fan
  • Peter Fanchi Fan
  • Peter Fanchi Laifan
Phone and address:
3345 Chemin De Riviere, San Jose, CA 95148
4082388256
Related to:
Connected to:

Peter Lai Phones & Addresses

  • 3345 Chemin De Riviere, San Jose, CA 95148 • 4082388256
  • Modesto, CA
  • 119 Beacon St, Mountain View, CA 94040 • 6509418151
  • Sunnyvale, CA

Resumes

Peter Lai Photo 1

Systems Engineer

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Location:
San Jose, CA
Industry:
Education Management
Work:
Applied Materials
Systems Engineer
Aj Tutoring
Director of Client Services
Aj Tutoring
Academic Tutor
Uc Davis Aug 2013 - Jun 2015
Physics Reader
Uc Davis Jan 2015 - Mar 2015
Physics Learning Assistant
Education:
San Jose State University 2018 - 2021
Master of Science, Masters University of California, Davis 2011 - 2015
Bachelors, Physics
Skills:
Research
Microsoft Office
Teaching
Public Speaking
Microsoft Excel
Powerpoint
Microsoft Word
Customer Service
Data Analysis
Editing
Event Planning
Higher Education
Physics
Training
Tutoring
Science
C++
Programming
C
Peter Lai Photo 2

System Engineer

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Location:
San Jose, CA
Industry:
Computer Hardware
Work:
United Airlines
System Engineer
Skills:
Photoshop
Microsoft Office
Microsoft Word
Research
Microsoft Excel
English
Public Speaking
Customer Service
Windows
Outlook
Languages:
Vietnamese
Peter Lai Photo 3

Peter Lai

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Location:
San Francisco, CA
Industry:
Computer Hardware
Work:
Sun Microsystems Jul 1994 - Jan 2010
Director of Engineering (Hardware Design)
Carmel Alison Lam Foundation Secondary School, Hong Kong Sep 1984 - Aug 1991
Senior Graduate Master
Kiangsu-Chekiang College, Kwai Chung, Hong Kong Sep 1983 - Aug 1984
Graduate Master
Education:
San Jose State University 1991 - 1994
MSEE, Electrical Engineering The University of Hong Kong 1980 - 1983
BSC, Physics
Skills:
Vlsi
Eda
Hardware Design
Physical Design
Ic
Processors
Timing
Circuit Design
Microprocessors
Asic
High Performance Computing
Silicon
Sun
Timing Closure
Hardware Architecture
Engineering Management
Rtl Design
Computer Architecture
Peter Lai Photo 4

Corporate Engineer

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Location:
424 La France Ave, Alhambra, CA 91801
Industry:
Defense & Space
Work:
Linquest
Corporate Engineer
Globalstar Nov 1, 2012 - Jun 30, 2016
Engineering Manager - Satellite System Engineering, Gnc, Dhs, and Gps Subsystems
Nasa Jet Propulsion Laboratory Nov 1, 2012 - Jun 30, 2016
Senior Spacecraft System Engineer Professional
Scientific Systems Company Jul 2012 - Oct 2012
Lead Research Engineer
Nasa Jet Propulsion Laboratory Jul 2012 - Oct 2012
On-Site Consultant
Education:
Purdue University 1993 - 1996
Doctorates, Doctor of Philosophy, Mechanical Engineering Purdue University 1992 - 1993
Master of Science, Masters, Engineering, Aerospace Engineering National Taiwan University 1986 - 1990
Bachelors, Bachelor of Science, Mechanical Engineering Kuang Jen Catholic High School
Skills:
Systems Engineering
Aerospace
Simulations
Engineering Management
Spacecraft
Engineering
Sensors
Finite Element Analysis
Space Systems
Fortran
Earned Value Management
Systems Design
Integration
Requirements Management
Trade Studies
Satellite
Avionics
Cfd
System Design
Six Sigma
Interests:
Science and Technology
Social Services
Languages:
English
Mandarin
Taiwanese
Peter Lai Photo 5

Outpatient Pharmacist

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Location:
702 Chemeketa Dr, San Jose, CA 95123
Industry:
Hospital & Health Care
Work:
Kaiser Permanente
Outpatient Pharmacy Supervisor
Kaiser Permanente
Outpatient Pharmacist
Target Aug 2014 - Sep 2015
Pharmacist
Cvs Pharmacy Apr 2012 - Jul 2013
Pharmacy Intern
Education:
University of the Pacific 2011 - 2014
Doctorates, Doctor of Pharmacy, Pharmacy Uc San Diego 2006 - 2010
Bachelors, Bachelor of Science, Biology South Pasadena Senior High 2006
Fort Lee High School 2006
Pasadena City College
Skills:
Powerpoint
Pharmacy
Microsoft Office
Microsoft Word
Microsoft Excel
Event Planning
Teamwork
Customer Service
Time Management
Healthcare
Data Analysis
Public Speaking
Research
Languages:
English
Peter Lai Photo 6

Peter P T Lai

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Peter Lai Photo 7

Peter Lai

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Peter Lai Photo 8

Peter Lai

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Medicine Doctors

Peter Lai Photo 9

Dr. Peter Y Lai, Modesto CA - MD (Doctor of Medicine)

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Specialties:
Cardiology
Interventional Cardiology
Address:
Sutter Gould Medical Foundation
1409 E Briggsmore Ave, Modesto, CA 95355
2095241211 (Phone)
Procedures:
Aneyrysm Stenting
Angioplasty
Arterial Angioplasty & Stenting
Atrial Fibrillation
Cardiac (Heart) Catheterization
Cardiac Angiography
Cardiac Catheterization
Cardiac Catheterization & Angioplasty Stenting
Cardiac Echocardiography
Cardiac Nuclear Stress Testing
Cardioversion
Chest Pain
Defibrillators
Dizziness
Echo Stress Test
Echocardiogram
Echocardiography
Edema
Ekg (Electrocardiogram, Ecg)
Endocarditis
Heart Attack
Holter Monitor
Hypertension (High Blood Pressure)
Implant Defibrillators
Lead Extraction
Long Qt Syndrome
Myocardial Infarction
Pacemakers
Pericarditis
Sick Sinus Syndrome
Stenting
Stress Tests
Syncope
Conditions:
Abnormal Heart Beats
Adults With Congenital Cardiac (Heart) Defects
Angina Pectoris
Aortic Valve Regurgitation
Aortic Valve Stenosis
Ateriosclerosis or Atherosclerosis (Hardening Of The Arteries)
Atrial Fibrillation
Bradycardia (Slow Heart Rate)
Cardiac (Heart) Arrhythmias
Cardiac (Heart) Disease
Cardiac (Heart) Palpitations
Cardiac Arrest (Heart Failure)
Cardiology
Cardiomyopathy
Cardiovascular (Heart & Blood Vessel) Disease
Chest Pain
Click-Murmur Syndrome
Congestive Heart Failure (Chf)
Coronary Artery Disease
Deep Vein Thrombosos (Dvt or Blood Clot)
Diseases Of The Aorta
Dizziness
Edema
Endocarditis
Heart Attack
Hypertension (High Blood Pressure)
Hypertension-Pulmonary
Intermittent Claudication
Lipid Disorder
Long Qt Syndrome
Marfan Syndrome
Mitral Insufficiency
Mitral Valve Prolapse
Mitral Valve Regurgitation
Mitral Valve Stenosis
Myocardial Infarction
Myocarditis
Pericardial Effusion
Pericarditis
Peripheral Arterial Disease
Poor Circulation
Prolaspe-Mitral Valve
Sick Sinus Syndrome
Syncope
Tachycardia (Rapid Heart Rate)
Thrombophlebitis
Venous Disease
Ventricular Septal Defect
Certifications:
Cardiology
Cardiovascular Disease, 1985
Internal Medicine
Interventional Cardiology
Awards:
Healthgrades Honor Roll
Languages:
English
Cantonese
Mandarin
Hospitals:
Sutter Gould Medical Foundation
1409 E Briggsmore Ave, Modesto, CA 95355

Memorial Medical Center
1700 Coffee Road, Modesto, CA 95355

Doctors Medical Center of Modesto
1441 Florida Avenue, Modesto, CA 95350

Stanislaus Surgical Hospital
1421 Oakdale Road, Modesto, CA 95355
Philosophy:
As a cardiologist I strive to stay abreast in the knowledge in the rapidly changing care in cardiovascular medicine. I enjoy conection with patients and their family and would work hard in earning their trust in my assessment and management. I welcome patients to participate in decision on my plan of care for them.
Education:
Medical School
National University Of Singapore
Graduated: 1976
Medical School
Mayo Clinic-Rochester
Graduated: 1980
Medical School
Mayo Clinic-Rochester
Graduated: 1982
Medical School
University Of Michigan Hospital
Graduated: 1985
Medical School
Univeristy Of Hong Kong
Graduated: 1971
Peter Lai Photo 10

Peter Y. Lai

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Specialties:
Cardiovascular Disease
Work:
Sutter Gould Medical GroupSutter Gould Medical Foundation
1409 E Briggsmore Ave FL 2, Modesto, CA 95355
2095504750 (phone), 2095725128 (fax)
Education:
Medical School
Nat'l Univ of Singapore, Fac of Med, Singapore
Graduated: 1976
Procedures:
Angioplasty
Cardiac Stress Test
Cardioversion
Pacemaker and Defibrillator Procedures
Cardiac Catheterization
Continuous EKG
Echocardiogram
Electrocardiogram (EKG or ECG)
Conditions:
Acute Myocardial Infarction (AMI)
Heart Failure
Ischemic Heart Disease
Mitral Valvular Disease
Angina Pectoris
Languages:
English
Spanish
Description:
Dr. Lai graduated from the Nat'l Univ of Singapore, Fac of Med, Singapore in 1976. He works in Modesto, CA and specializes in Cardiovascular Disease. Dr. Lai is affiliated with Memorial Medical Center.
Peter Lai Photo 11

Peter P. Lai

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Specialties:
Radiation Oncology
Work:
Lakeland Hospital Radiation Oncology
1234 Napier Ave, Saint Joseph, MI 49085
2699838888 (phone), 2699824937 (fax)
Education:
Medical School
University of Pennsylvania School of Medicine
Graduated: 1984
Languages:
Chinese
English
Description:
Dr. Lai graduated from the University of Pennsylvania School of Medicine in 1984. He works in Saint Joseph, MI and specializes in Radiation Oncology. Dr. Lai is affiliated with Lakeland Healthcare.
Peter Lai Photo 12

Peter Yuek Too Lai, Modesto CA

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Specialties:
Internal Medicine
Cardiovascular Disease
Cardiology
Vascular & Interventional Radiology
Work:
Sutter Medical Foundation
1409 E Briggsmore Ave, Modesto, CA 95355
Sutter Medical Foundation
600 Coffee Rd, Modesto, CA 95355
Education:
National University Of Singapore (1976)
Peter Lai Photo 13

Peter Yt Lai, Modesto CA

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Specialties:
Cardiologist
Address:
1409 E Briggsmore Ave, Modesto, CA 95355
600 Coffee Rd, Modesto, CA 95355
Education:
Doctor of Medicine
Board certifications:
American Board of Internal Medicine Certification in Internal Medicine
American Board of Internal Medicine Sub-certificate in Cardiovascular Disease (Internal Medicine)
American Board of Internal Medicine Sub-certificate in Interventional Cardiology (Internal Medicine)

Us Patents

  • Method For Double-Layer Implementation Of Metal Options In An Integrated Chip For Efficient Silicon Debug

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  • US Patent:
    6396149, May 28, 2002
  • Filed:
    Jun 13, 2000
  • Appl. No.:
    09/593284
  • Inventors:
    Xuejun Yuan - San Jose CA
    Xiaowei Jin - Mountain View CA
    Rambabu Pyapali - Santa Clara CA
    Raymond A. Heald - Los Altos CA
    James M. Kaku - Palo Alto CA
    Helen Dunn - San Jose CA
    Thelma C. Taylor - San Jose CA
    Peter F. Lai - Mountain View CA
    Aharon Ostrer - Sunnyvale CA
  • Assignee:
    Sun Microsystems, Inc. - Palo Alto CA
  • International Classification:
    H01L 2710
  • US Classification:
    257758, 257202
  • Abstract:
    In one aspect of the present invention, a method provides a connecting path diversion through an upper layer of an integrated circuit by alteration of a connecting path through a lower layer of the integrated circuit. This method enables a circuit path in an integrated circuit to be modified in an accessible layer for testing before the modified circuit path is incorporated in a redesigned integrated circuit design. In another aspect of the present invention, a modified multi-layer integrated circuit chip includes a connecting path formed in a lower layer and a substitute connecting path that is etched in the lower layer. Subsequently, the connecting path formed in the lower layer may be severed.

  • Method For Double-Layer Implementation Of Metal Options In An Integrated Chip For Efficient Silicon Debug

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  • US Patent:
    6596563, Jul 22, 2003
  • Filed:
    Mar 4, 2002
  • Appl. No.:
    10/091620
  • Inventors:
    Xuejun Yuan - San Jose CA
    Xiaowei Jin - Mountain View CA
    Rambabu Pyapali - Santa Clara CA
    Raymond A. Heald - Los Altos CA
    James M. Kaku - Palo Alto CA
    Helen Dunn - San Jose CA
    Thelma C. Taylor - San Jose CA
    Peter F. Lai - Mountain View CA
    Aharon Ostrer - Sunnyvale CA
  • Assignee:
    Sun Microsystems, Inc. - Santa Clara CA
  • International Classification:
    H01L 2144
  • US Classification:
    438118, 438652
  • Abstract:
    In one aspect of the present invention, a method provides a connecting path diversion through an upper layer of an integrated circuit by alteration of a connecting path through a lower layer of the integrated circuit. This method enables a circuit path in an integrated circuit to be modified in an accessible layer for testing before the modified circuit path is incorporated in a redesigned integrated circuit design. In another aspect of the present invention, a modified multi-layer integrated circuit chip includes a connecting path formed in a lower layer and a substitute connecting path that is etched in the lower layer. Subsequently, the connecting path formed in the lower layer may be severed.

  • Method And System For Providing A Netlist Driven Integrated Router In A Non-Netlist Driven Environment

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  • US Patent:
    6654942, Nov 25, 2003
  • Filed:
    Aug 22, 2001
  • Appl. No.:
    09/938120
  • Inventors:
    Sachin Chopra - Santa Clara CA
    Peter Fu - Sunnyvale CA
    Peter Lai - San Jose CA
    Srirarm Satakopan - Sunnyvale CA
    Hsiu-Nien Chen - San Jose CA
    Von-Kyoung Kim - Santa Clara CA
    Yongjun Zhang - Sunnyvale CA
  • Assignee:
    Sun Microsystems, Inc. - Santa Clara CA
  • International Classification:
    G06F 1750
  • US Classification:
    716 12, 716 14, 716 13
  • Abstract:
    Method and system for providing a netlist driven integrated router in a non-netlist driven environment for microprocessor designs includes retrieving top level netlist for the existing microprocessor design from the top level database and the design parameters for the new microprocessor design, and translating these netlist and design parameters at the front end so that the resulting data can be provided to an integrated router which is configured to generate re-routes for the new microprocessor design based on the top level netlist and the design parameters, where the generated re-routes are provided to a back end for translating the re-routes to new top level netlist and merging the new top level netlist with the existing top level netlist database.

  • Aggregation Of Storage Elements Into Stations And Placement Of Same Into An Integrated Circuit Or Design

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  • US Patent:
    6775813, Aug 10, 2004
  • Filed:
    Sep 10, 2002
  • Appl. No.:
    10/238357
  • Inventors:
    Sachin Chopra - Cupertino CA
    Yu-Yen Mo - San Jose CA
    Shyam Sundar - Sunnyvale CA
    Peter F. Lai - San Jose CA
    Venkat Podduturi - San Jose CA
    Vishal Chopra - Cupertino CA
  • Assignee:
    Sun Microsystems, Inc. - Santa Clara CA
  • International Classification:
    G06F 945
  • US Classification:
    716 10, 716 8, 716 9
  • Abstract:
    The present invention describes a method and apparatus for placing flops in a complex circuit design. Initially, the method calculates a physical range for every net that requires a flop, within which the flop can be placed satisfying the timing requirement. After the physical range is defined, the method groups these flops and determines a block where these grouped flops can be placed. Grouping these flops into one block (flop station) can preserve a compact layout for the design. The flops are then connected to appropriate nets.

  • Reconfigurable Multi-Chip Modules

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  • US Patent:
    6779131, Aug 17, 2004
  • Filed:
    May 1, 2001
  • Appl. No.:
    09/846943
  • Inventors:
    Rambabu Pyapali - Santa Clara CA
    Xuejun Yuan - Sunnyvale CA
    Xiaowei Jin - Mountain View CA
    Peter Lai - San Jose CA
    Samer H. Haddad - Fremont CA
    Jeffrey Wong - Fremont CA
  • Assignee:
    Sun Microsystems, Inc. - Santa Clara CA
  • International Classification:
    G06F 1100
  • US Classification:
    714 8
  • Abstract:
    The present invention relates to a method and apparatus for a reconfigurable multi-chip module. The reconfigurable multi-chip module includes a processor; a memory module connected to the processor; and a memory control component for controlling whether the processor uses the memory module. The method of producing multi-chip modules includes assembling a processor and a memory module on the multi-chip module; testing the memory module; and selectively configuring the processor to use the memory module based on the testing of the memory module.

  • Method And Apparatus For Signal Electromigration Analysis

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  • US Patent:
    6954914, Oct 11, 2005
  • Filed:
    Mar 24, 2003
  • Appl. No.:
    10/395436
  • Inventors:
    Shyam Sundar - Sunnyvale CA, US
    Aveek Sarkar - Mountain View CA, US
    Peter F. Lai - San Jose CA, US
    Rambabu Pyapali - Cupertino CA, US
    Teong Ming Cheah - Sunnyvale CA, US
  • Assignee:
    Sun Microsystems, Inc. - Santa Clara CA
  • International Classification:
    G06F017/50
  • US Classification:
    716 5, 716 6, 716 2
  • Abstract:
    The present application describes various embodiments of a method and an apparatus for determining electromigration risks for signal nets in integrated circuits. A model for each one of the global nets connecting various circuit blocks in an integrated circuit is created using circuit blocks' timing model and detailed standard parasitic format representation (DSPF) of each global net. The final layout of the integrated circuit is not necessary to determine the electromigration risks. The models can be generated during the early stages of the design cycle once the DSPF of the global nets is available.

  • Method And Apparatus For Power Consumption Analysis In Global Nets

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  • US Patent:
    7007256, Feb 28, 2006
  • Filed:
    Mar 6, 2003
  • Appl. No.:
    10/383092
  • Inventors:
    Aveek Sarkar - Mountain View CA, US
    Shyam Sundar - Sunnyvale CA, US
    Peter F. Lai - San Jose CA, US
    Rambabu Pyapali - Cupertino CA, US
  • Assignee:
    Sun Microsystems, Inc. - Santa Clara CA
  • International Classification:
    G06F 9/45
    G06F 9/455
    G06F 17/50
  • US Classification:
    716 6, 716 4, 716 11, 703 14, 703 19
  • Abstract:
    The present invention describes a method and an apparatus for determining switching power consumption of global devices (e. g. , repeaters, flops or the like) in an integrated circuit design during high-level design phase after the global routing for the integrated circuit is available. The clock cycle is divided into various timing intervals and the timing reports are generated for each cycle to determine a time-domain staggered distribution of each device's switching activity within a given timing interval. Each device's switching activity is analyzed within the given timing interval (or segment thereof). The power consumption is determined for each device that switches in the given timing interval.

  • Low Threshold Voltage Transistor Displacement In A Semiconductor Device

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  • US Patent:
    7032200, Apr 18, 2006
  • Filed:
    Sep 9, 2003
  • Appl. No.:
    10/657964
  • Inventors:
    Sriram Satakopan - Sunnyvale CA, US
    Arvindvel Shanmugavel - Mountain View CA, US
    Shunjiang Xu - Sunnyvale CA, US
    Von-Kyoung Kim - Santa Clara CA, US
    Peter Lai - San Jose CA, US
  • Assignee:
    Sun Microsystems, Inc. - Santa Clara CA
  • International Classification:
    G06F 17/50
  • US Classification:
    716 6, 716 4, 716 5
  • Abstract:
    A technique improves the performance of an integrated circuit design by selectively replacing low Vtransistors with standard Vtransistors. The selection of gates for replacement may be based on a multi-path timing analysis. If a low Vvariant of a gate instance increases a path cycle time as compared to a standard Vcounterpart, the maximum of the path cycle times for all paths that include the low Vvariant and the maximum of the path cycle time for these paths with a standard Vvariant are calculated. If the maximum path cycle time for the path including the low Vvariant is greater than the maximum path cycle time for the path including the standard Vvariant, then that low Vvariant is substituted with a standard Vvariant. Thus, integrated circuit designs prepared in accordance with the invention may exhibit improved cycle times.
Name / Title
Company / Classification
Phones & Addresses
Peter P. Lai
President
WAH HING CORPORATION
Real Estate Agent/Manager
8192 Locust Pl S, Dublin, CA 94568
1624 E 32 St, Oakland, CA 94602
5105013358
Peter Y. Lai
Medical Doctor
Lai Peter MD
Medical Doctor's Office
1409 E Briggsmore Ave, Modesto, CA 95355
Peter Lai
Cardiovascular
Sutter Gould Medical Foundation
Civic and Social Associations · Civic/Social Association
1329 Spanos Ct, Modesto, CA 95355
Peter Lai
Vice-President
Pcc Logistics
Transportation Services
737 Bay St, Oakland, CA 94607
5108935420, 5108938351
Peter Lai
General Manager
Soft Mixed Signal Corp
Semiconductors · Commercial Physical Research
2041 Msn College Blvd #170, Santa Clara, CA 95054
2041 Micaion Clge Blvd, Santa Clara, CA 95054
4086549555
Peter F. Lai
Owner
Hughson Department Store
Ret Family Clothing
7024 Hughson Ave, Hughson, CA 95326
2098834456
Peter Y.h. Lai
Secretary
RIO DEL ORO HOLDINGS LIMITED
Peter Lai
President
APPTOM CORPORATION
5536 Tan Oak Dr, Fremont, CA 94555

Wikipedia References

Peter Lai Photo 14

Peter Lai

Work:

In 1973, he joined the Hong Kong Civil Service, and held various political and managerial posts, including in the New Territories Administration, the Urban Services Department, the Immigration Department ( Hong Kong ), the Lands and Works Branch, the Civil Service Branch and the Constitutional and Mainland Affairs Bureau....

Education:

Lai graduated from Hong Kong University with a first-class honours degree in history ( majoring in Modern Chinese History )....

Skills & Activities:
Preference:

Associate

Plaxo

Peter Lai Photo 15

peter lai

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Peter Lai Photo 16

Peter Lai

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Pei-Fu Industrial Building, Singapore
Peter Lai Photo 17

Peter Lai

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Retired
Peter Lai Photo 18

Peter Lais

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Angelbachtal

Classmates

Peter Lai Photo 19

Peter Lai

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Schools:
Brebeuf High School Willowdale Morocco 1986-1988
Community:
Patricia Griffin, Craig Austen, Rebecca Lehmann, Sue Burns
Peter Lai Photo 20

Peter Lai

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Schools:
Westwood Junior High School Toronto Morocco 1998-2002
Community:
Gabe Nemeth, Bruce Leighton, Pat Wells, Ingrid Leineweber
Peter Lai Photo 21

Peter Lai

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Schools:
Unversity of Ottawa Ottawa Morocco 1978-1982
Community:
Louis Souliere, James Carlin, Roberta Simpson, Patrick Ouellette
Peter Lai Photo 22

Peter Lai

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Schools:
Luther High School Regina Afghanistan 1973-1977
Community:
John Wellman, Mickey Elfenbein, Joanne Bruneau, June Evans, Robert Gordon
Peter Lai Photo 23

Peter Lai

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Schools:
Stoutland High School Stoutland MO 1984-1988
Community:
Rhonda Pinion, Doug Wyant, Charlas Patton, Kimberly Durham, Shannon Barclay, Jonna Wilson, Ronda Clough, Johnny Perkins, Mary West, Preston Brandt, Andy Milligan
Peter Lai Photo 24

Peter Lai, Adams Elementa...

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Peter Lai Photo 25

Peter Lai | Harbord Colle...

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Peter Lai Photo 26

Prince of Wales School, H...

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Graduates:
Cathy Robinson (1982-1984),
Annie McDonald (1943-1947),
Peter Lai (1992-1996),
Julie McKinnon (1978-1987)

Youtube

Talk / Hot Talk: Peter Lai

Talk / Hot Talk: Peter Lai
  • Duration:
    33m 36s

LITTLE TOKYO SERIES: "Fantasy Come True: Pete...

LITTLE TOKYO SERIES: "Fantasy Come True: Peter Lai...

As screened April 24th at the 2016 Los Angeles Asian Pacific Film Fest...

  • Duration:
    10m 24s

Mongolian Incredible Throat Singing

Mongolian Incredible Throat Singing

Purchase this song (newly recorded)...

  • Duration:
    3m 3s

Mongolian Incredible Throat Singing - Part 2

Mongolian Incredible Throat Singing - Part 2

Sorry to keep you waiting. After reaching almost a million views on Mr...

  • Duration:
    3m 11s

Asian Voices - Secret Japanese Village

Asian Voices - Secret Japanese Village

Chinese Costume Designer Peter Lai gives us a tour of his secret Japan...

  • Duration:
    7m 32s

Lewis Capaldi -- Someone you loved (Cover by ...

Lewis Capaldi -- Someone you loved (Cover by Peter...

... Lai, ... For more covers IG/...

  • Duration:
    1m 45s

Myspace

Peter Lai Photo 27

Peter Lai

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Locality:
Berkeley, California
Gender:
Male
Birthday:
1939
Peter Lai Photo 28

Peter Lai

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Locality:
Austin, TX / Albuquerque
Gender:
Male
Birthday:
1937
Peter Lai Photo 29

Peter Lai

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Locality:
California
Gender:
Male
Birthday:
1951
Peter Lai Photo 30

peter lai

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Locality:
Malaysia
Gender:
Male
Birthday:
1943
Peter Lai Photo 31

Peter Lai

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Locality:
FALL RIVER, MASSACHUSETTS
Gender:
Male
Birthday:
1945
Peter Lai Photo 32

peter lai

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Locality:
edinburgh, United Kingdom
Gender:
Male
Birthday:
1931
Peter Lai Photo 33

Peter Lai

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Peter Lai Photo 34

Peter Lai

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Googleplus

Peter Lai Photo 35

Peter Lai

Work:
Quality Distributors - Vice President (1989)
IBM - Associate Engineer (1987-1989)
Education:
University of Washington
Peter Lai Photo 36

Peter Lai

Education:
Methodist 3 - IPA
Relationship:
Single
Peter Lai Photo 37

Peter Lai

Lived:
San Jose, CA
Peter Lai Photo 38

Peter Lai

Education:
University of California, Davis
Peter Lai Photo 39

Peter Lai

Tagline:
Looks vaguely human-like. Mostly black hair.
Peter Lai Photo 40

Peter Lai

Peter Lai Photo 41

Peter Lai

Peter Lai Photo 42

Peter Lai

Facebook

Peter Lai Photo 43

Lai Peter

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Peter Lai Photo 44

Peter Lai Gau

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Peter Lai Photo 45

Peter Lai Gim Chye

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Takwai Peter Lai

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Peter Lai

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Peter Lai

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Peter Lai

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Peter Lai Photo 50

Peter J Lai

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Flickr

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Peter Lai Photo 52
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Peter Lai Photo 54
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Peter Lai Photo 57
Peter Lai Photo 58
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