Peter Alan Levine

US Patent:

6535275, Mar 18, 2003

Filed:

Jan 30, 2001

Appl. No.:

09/772361

Inventors:

Nathaniel Joseph McCaffrey - Delaware Township NJ
Robert James Andreas - Lawrenceville NJ
Peter Alan Levine - West Windsor NJ
Ramon Ubaldo Martinelli - Hightstown NJ

Assignee:

Dialog Semiconductor GmbH - Kirchheim

International Classification:

G01C 308

US Classification:

356 508, 3561411

Abstract:

A three-dimensional imaging range finder is disclosed using a transmitted pulse reflected from a target. The range finder includes a pixel sensor for receiving light from the target and the reflected pulse. A global counter is provided for determining a time-of-flight value of the transmitted pulse by providing accurate count data to pixel memories. A processing circuit, which is coupled to the pixel sensor and the global counter, extracts the reflected pulse received by the pixel sensor, and stores the time-of-flight value upon extracting the reflected pulse. The pixel sensor provides a luminance signal and the processing circuit includes a high pass filter to extract the reflected pulse from the luminance signal.

US Patent:

7265397, Sep 4, 2007

Filed:

Aug 30, 2001

Appl. No.:

09/942835

Inventors:

John Robertson Tower - Yardley PA, US
Peter Alan Levine - West Windsor NJ, US
Pradyumna Kumar Swain - Franklin Park NJ, US
Nathaniel Joseph McCaffrey - Rosemont NJ, US
Taner Dosluoglu - New York NY, US

Assignee:

Sarnoff Corporation - Princeton NJ

International Classification:

H01L 27/148
H01L 29/768

US Classification:

257223, 257246, 257247, 257248, 257249

Abstract:

An optical sensor circuit for generating signals corresponding to received photoelectrons is formed on a single monolithic substrate and includes a charge coupled device (CCD) array. The array is formed of a plurality of pixels constructed by a standard CMOS process. Each pixel is formed of at least one charge well of minority carriers and a gate oxide layer overlaying the at least one charge well. At least two spaced gate electrodes corresponding in position to the at least two charge wells overlays the gate oxide layer. The space between adjacent electrodes defines a gap to transfer charge between adjacent ones of at the least two spaced gate electrodes and the gap is stabilized. A back-illuminated imager is also described in which photocarriers are diverted from devices integrated with the pixel by a PN junction formed in the pixel structure.

US Patent:

7554590, Jun 30, 2009

Filed:

Dec 23, 2003

Appl. No.:

10/744566

Inventors:

Nathaniel Joseph McCaffrey - Stockton NJ, US
Peter Zalud - New Hope PA, US
Peter Levine - West Windsor NJ, US
Gary Hughes - Westlake Village CA, US

Assignee:

Digital Imaging Systems GmbH - Kirchheim/Teck-Nabern

International Classification:

H04N 3/14
H04N 5/335
H04N 9/04
H04N 9/083

US Classification:

348308, 348280

Abstract:

A new method of reading an imager is achieved. The method comprises providing an imager array comprising n rows and m columns where a pair of rows can be read during a single row access time. A first image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows of the imager array. The reading begins at a first row, and the reading stops when less than three rows are unread. Thereafter pixel values of the next row are read and not stored. Thereafter pixel values of the first row of the imager array are read and not stored. A second image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows. The reading begins at the second row, the reading stops when less than two rows are unread.

US Patent:

7830431, Nov 9, 2010

Filed:

Jun 12, 2009

Appl. No.:

12/456167

Inventors:

Nathaniel Joseph McCaffrey - Stockton NJ, US
Peter Zalud - New Hope PA, US
Peter Levine - West Windsor NJ, US
Gary Hughes - Westlake Village CA, US

Assignee:

Digital Imaging Systems GmbH - Kirchheim/Teck-Nabern

International Classification:

H04N 3/15
H04N 9/07

US Classification:

348281

Abstract:

A new method of reading an imager is achieved. The method comprises providing an imager array comprising n rows and m columns where a pair of rows can be read during a single row access time. A first image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows of the imager array. The reading begins at a first row, and the reading stops when less than three rows are unread. Thereafter pixel values of the next row are read and not stored. Thereafter pixel values of the first row of the imager array are read and not stored. A second image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows. The reading begins at the second row, the reading stops when less than two rows are unread.

US Patent:

7932575, Apr 26, 2011

Filed:

Apr 28, 2009

Appl. No.:

12/431150

Inventors:

Mahalingam Bhaskaran - Lawrenceville NJ, US
Pradyumna Kumar Swain - Gaithersburg MD, US
Peter Levine - West Windsor NJ, US
Norman Goldsmith - East Brunswick NJ, US

Assignee:

SRI International - Menlo Park CA

International Classification:

H01L 21/00

US Classification:

257447, 257E27133, 257E27112, 257E21561, 257347

Abstract:

A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The method for manufacturing the imaging device includes the steps of providing a substrate comprising an insulator layer, and an epitaxial layer substantially overlying the insulator layer; fabricating at least one imaging component at least partially overlying and extending into the epitaxial layer; forming a plurality of bond pads substantially overlying the epitaxial layer; fabricating a dielectric layer substantially overlying the epitaxial layer and the at least one imaging component; providing a handle wafer; forming a plurality of conductive trenches in the handle wafer; forming a plurality of conductive bumps on a first surface of the handle wafer substantially underlying the conductive trenches; and bonding the plurality of conductive bumps to the plurality of bond pads.

US Patent:

20060022113, Feb 2, 2006

Filed:

Jul 26, 2005

Appl. No.:

11/189650

Inventors:

John Tower - Yardley PA, US
Peter Levine - West Windsor NJ, US

International Classification:

C12Q 1/68
H01J 40/00

US Classification:

250200000

Abstract:

Methods and apparatus for imaging light are disclosed. Light is imaged by collecting light, converting the collected light into a electrical charge signal, multiplying the electrical charge signal to produce multiple electrical charge signals with associated levels of gain, converting the electrical charge signals to voltage signals, and developing an output signal from one or more of the voltage signals that represents the collected light. The electrical charge signal may be multiplied using an electron multiplication device associated with multiple taps to produce the electrical charge signal with different levels of gain.

US Patent:

44907443, Dec 25, 1984

Filed:

Aug 13, 1982

Appl. No.:

6/407926

Inventors:

Peter A. Levine - Trenton NJ

Assignee:

RCA Corporation - New York NY

International Classification:

H04N 314

US Classification:

358213

Abstract:

Three embodiments of an improved smear reduction technique, for reducing substantially all the smear in a CCD field-transfer imager system due to the presence of a bright spot in the projected image, regardless of whether the bright spot remains fixed or whether the bright spot moves between successive field periods. Prior smear reduction techniques were not effective with respect to a moving bright spot. Structurally the improved system employs a CCD field-transfer imager including a line register, in addition to conventional A and B, for collecting smear charge produced in the A register during each successive field period. The smear line register cooperates with associated circuitry to provide the improved smear reduction. In a first and second of the three embodiments, the imager includes a conventional C line register for deriving a smeared video output applied as an input to the associated circuitry, and the smear line register is an additional line register, known as the D register. In a third of the three embodiments, the conventional C register is omitted and a single line register, known as a C-D register, performs the functions of both the C and D line registers in the first and second embodiments.

US Patent:

44994974, Feb 12, 1985

Filed:

Dec 27, 1982

Appl. No.:

6/452914

Inventors:

Peter A. Levine - Trenton NJ

Assignee:

RCA Corporation - New York NY

International Classification:

H04N 314

US Classification:

358213

Abstract:

At low light levels, the floating diffusion output stage of a CCD imager has the peaks of the reset pulses applied to its reset gate reduced. This introduces spatial integration in the direction of line scan that improves the signal-to-noise ratio of the video samples supplied as imager output.