Joseph M. Dragony - Carmichael CA Prashant Sethi - Folsom CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G09G 539
US Classification:
345531, 345559, 345568, 711206
Abstract:
A size of a tile of memory is determined, where a tile is a segment of the memory having a dimension that is less than a pitch of the memory. Data is then stored in the tile. To access the data, a graphics processor obtains an indication (from a configuration register) that the memory is tiled, and accesses the data stored in the tile before accessing other segments of the memory.
Allocating Memory Based On Memory Device Organization
Prashant Sethi - Folsom CA Arie Chobotaro - Kyriat ata, IL Murali Ramadoss - Folsom CA Roman Surgutchik - Karkur, IL
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 1202
US Classification:
345543, 345542, 711171
Abstract:
Memory is allocated for use by a graphics processor. Available portions of system memory are identified by requesting an amount of system memory from an operating system and receiving locations of the available portions from the operating system. Those available portions are then allocated for use by the graphics processor based at least in part on the devices in which the available portions are located.
Method And Apparatus For Updating Device Driver Control Data
Arie Chobotaro - Kyriat Ata, IL Prashant Sethi - Folsom CA David Borislav Girshovich - Nazereth-Illit, IL Michael W. Donlon - Diamond Springs CA Israel P. Ramirez - El Dorado Hills CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 1300
US Classification:
710 8, 710 10, 710 36, 710 56, 710 65, 710 74
Abstract:
Control data for a device driver that is stored on a first non-volatile memory is updated by writing new driver control data to a second non-volatile memory. In an embodiment, the new driver control data may be stored on the second non-volatile memory without modifying the control data on the first non-volatile memory. In a further embodiment, a processor reads non-volatile from the first non-volatile memory into a system memory, reads supplemental driver control data from the second non-volatile memory, and updates the set of driver control data in the system memory based on the supplemental driver control data.
Joseph M. Dragony - Carmichael CA Prashant Sethi - Folsom CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 1202
US Classification:
345543, 711171
Abstract:
Memory is allocated for use by a graphics processor. Available portions of system memory are identified by requesting an amount of system memory from an operating system and receiving locations of the available portions from the operating system. Those available portions are then allocated for use by the graphics processor.
System Including Real-Time Data Communication Features
Prashant Sethi - Folsom CA, US Carl L. First - Gilroy CA, US Krishnan Rajamani - San Diego CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F013/14
US Classification:
710 22, 710 29, 710 33, 710107, 710308
Abstract:
A system includes a direct memory access (DMA) engine to move data on a real time basis and a communication front-end to transmit and receive the data. In another embodiment, the system may also include a medium access control (MAC) to control transmission and reception of the data and that may be partitioned or divided according to response times to carry out selected functions.
Joseph A. Bennett - Roseville CA, US Randolph L. Campbell - Sacramento CA, US Prashant Sethi - Folsom CA, US Jose Vargas - Folsom CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F012/10
US Classification:
711202, 711209, 710 10, 710 9
Abstract:
A method for accessing a configuration data space for a device connected to a processor through an interconnect includes receiving a request from the processor to access the processor's addressable space. The request is generated in response to receiving an instruction intended to access the device's configuration data space. A map between the device's configuration data space and the processor's addressable space is accessed, the map having previously mapped the device's configuration data space to one or more pages of the processor's addressable space. Using the map, the request from the processor is translated into a configuration cycle on the interconnect to access the device's configuration data space.
Device Virtualization And Assignment Of Interconnect Devices
Joseph A. Bennett - Roseville CA, US Randolph L. Campbell - Sacramento CA, US Prashant Sethi - Folsom CA, US Jose Vargas - Folsom CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 17/00
US Classification:
718 1, 711202
Abstract:
A method for assigning a device to a first virtual machine includes connecting the device, directly or indirectly, to a computer through an interconnect. The first virtual machine and a second virtual machine are run on the computer. The device is assigned to the first virtual machine for exclusive use by the first virtual machine, and the assignment is enforced.
Method And Apparatus For In-Band Signaling Of Runtime General Purpose Events