Raymond Francis Chan

US Patent:

6539465, Mar 25, 2003

Filed:

Dec 13, 2000

Appl. No.:

09/736709

Inventors:

Raymond K. Chan - Fremont CA
Mario F. Au - Fremont CA

Assignee:

Integrated Device Technology, Inc. - Santa Clara CA

International Classification:

G06F 1204

US Classification:

711201, 711203, 711211, 711212

Abstract:

A first-in-first-out (FIFO) memory device includes a plurality of FIFO memory cores that contain a plurality of cells. A variable cell size circuit supports user programmable cell sizes in a FIFO memory device to permit selection of a wide range of cell sizes. The variable cell size circuit controls successive accesses to a cell in the memory device, and it resets a byte count when the byte; count equals the cell size value to initialize the circuit for a subsequent access operation. The variable cell size circuit further includes a prediction circuit that indicates completion of access to the cell a predetermined number of counts prior to completion of the actual access. An alignment circuit generates data for write operations in cells that store an odd number of bytes per cell to compensate for the two byte per cell read operations. Each FIFO memory core includes a circuit that generates a cell available signal to indicate whether a cell in a corresponding FIFO memory core is available for reading. An arbiter receives the cell available signals, and it generates control signals to select one of the FIFO memory cores.

US Patent:

8222046, Jul 17, 2012

Filed:

Apr 29, 2009

Appl. No.:

12/432307

Inventors:

Zong-Li Xia - Sunnyvale CA, US
Raymond Chan - Redwood City CA, US
Kelly Doan - San Jose CA, US

Assignee:

Remel, Inc. - Lenexa KS

International Classification:

G01N 33/558

US Classification:

436514, 422401, 422420, 422430, 435 75, 4352872, 4352877, 4352879, 435805, 435810, 435970, 436524, 436527, 436810

Abstract:

The present invention is directed to immunoassays for detecting one or more target analytes in a fluid sample wherein the detection reaction occurs on a solid support and involves an amplification system. In particular, the invention is directed to making and using a test device having at least one site for detecting the presence of at least one target analyte, wherein a conjugate comprising dextran-polystreptavidin is immobilized at the test site(s) as a capture reagent for a complex containing the target analyze.

US Patent:

20060046310, Mar 2, 2006

Filed:

Aug 25, 2005

Appl. No.:

11/211292

Inventors:

Zong-Li Xia - Sunnyvale CA, US
Raymond Chan - Redwood City CA, US
Kelly Doan - San Jose CA, US

International Classification:

G01N 33/558

US Classification:

436514000

Abstract:

The present invention is directed to immunoassays for detecting one or more target analytes in a fluid sample wherein the detection reaction occurs on a solid support and involves an amplification system. In particular, the invention is directed to making and using a test device having at least one site for detecting the presence of at least one target analyte, wherein a conjugate comprising dextran-polystreptavidin is immobilized at the test site(s) as a capture reagent for a complex containing the target analyte.

US Patent:

6122717, Sep 19, 2000

Filed:

Jun 17, 1996

Appl. No.:

8/664873

Inventors:

Raymond K. Chan - Fremont CA
Mario F. Au - Fremont CA

Assignee:

Integrated Device Technology, Inc. - Santa Clara CA

International Classification:

G06F 1202

US Classification:

711170

Abstract:

A first-in-first-out (FIFO) memory device includes a plurality of FIFO memory cores that contain a plurality of cells. A variable cell size circuit supports user programmable cell sizes in a FIFO memory device to permit selection of a wide range of cell sizes. The variable cell size circuit controls successive accesses to a cell in the memory device, and it resets a byte count when the byte count equals the cell size value to initialize the circuit for a subsequent access operation. The variable cell size circuit further includes a prediction circuit that indicates completion of access to the cell a predetermined number of counts prior to completion of the actual access. An alignment circuit generates data for write operations in cells that store an odd number of bytes per cell to compensate for the two byte per cell read operations. Each FIFO memory core includes a circuit that generates a cell available signal to indicate whether a cell in a corresponding FIFO memory core is available for reading. An arbiter receives the cell available signals, and it generates control signals to select one of the FIFO memory cores.

US Patent:

62437992, Jun 5, 2001

Filed:

Aug 7, 1998

Appl. No.:

9/130569

Inventors:

Raymond K. Chan - Fremont CA
Mario F. Au - Fremont CA

Assignee:

Integrated Device Technology, Inc. - Santa Clara CA

International Classification:

G06F 1206

US Classification:

711212

Abstract:

A first-in-first-out (FIFO) memory device includes a plurality of FIFO memory cores that contain a plurality of cells. A variable cell size circuit supports user programmable cell sizes in a FIFO memory device to permit selection of a wide range of cell sizes. The variable cell size circuit controls successive accesses to a cell in the memory device, and it resets a byte count when the byte: count equals the cell size value to initialize the circuit for a subsequent access operation. The variable cell size circuit further includes a prediction circuit that indicates completion of access to the cell a predetermined number of counts prior to completion of the actual access. An alignment circuit generates data for write operations in cells that store an odd number of bytes per cell to compensate for the two byte per cell read operations. Each FIFO memory core includes a circuit that generates a cell available signal to indicate whether a cell in a corresponding FIFO memory core is available for reading. An arbiter receives the cell available signals, and it generates control signals to select one of the FIFO memory cores.

US Patent:

59583002, Sep 28, 1999

Filed:

Feb 6, 1998

Appl. No.:

9/019831

Inventors:

Raymond Chan - Redwood City CA

Assignee:

Genzyme Corporation - Framingham MA

International Classification:

G01N 3100

US Classification:

2524081

Abstract:

The object of the present invention is to claim a composition which when added to a patient sample containing a target antigen in an acidic or formalin-containing transport medium neutralizes the acid and formalin while preserving immunoreactivity of the antigen allowing its detection. The composition comprises an amino glycol buffer, an amino acid, a salt, and a non-ionic detergent. A further object of the present invention is to claim a method of processing a sample by adding a composition comprising an amino glycol buffer, an amino acid, a salt, and a non-ionic detergent.

US Patent:

62302493, May 8, 2001

Filed:

Aug 7, 1998

Appl. No.:

9/130065

Inventors:

Raymond K. Chan - Fremont CA
Mario F. Au - Fremont CA

Assignee:

Integrated Device Technology, Inc. - Santa Clara CA

International Classification:

G06F 1204
G06F 9315

US Classification:

711212

Abstract:

A first-in-first-out (FIFO) memory device includes a plurality of FIFO memory cores that contain a plurality of cells. A variable cell size circuit supports user programmable cell sizes in a FIFO memory device to permit selection of a wide range of cell sizes. The variable cell size circuit controls successive accesses to a cell in the memory device, and it resets a byte count when the byte count equals the cell size value to initialize the circuit for a subsequent access operation. The variable cell size circuit further includes a prediction circuit that indicates completion of access to the cell a predetermined number of counts prior to completion of the actual access. An alignment circuit generates data for write operations in cells that store an odd number of bytes per cell to compensate for the two byte per cell read operations. Each FIFO memory core includes a circuit that generates a cell available signal to indicate whether a cell in a corresponding FIFO memory core is available for reading. An arbiter receives the cell available signals, and it generates control signals to select one of the FIFO memory cores.

US Patent:

55153810, May 7, 1996

Filed:

Jan 14, 1992

Appl. No.:

7/823078

Inventors:

Raymond S. Chan - Mountain View CA

Assignee:

Tandem Computers Incorporated - Cupertino CA

International Classification:

G06F 1110

US Classification:

371 377

Abstract:

An apparatus and method of correcting parity errors in a fault tolerant computer system. Data and associated parity are checked in parallel with use of the data by an ALU. Upon detection of an error, a controller causes the ALU to pass the input data unchanged and associates a correct parity with the input data. The correct parity generation is done in parallel with ALU processing to permit rapid reassociation of data and its correct parity. The reassociated data is returned to the ALU for processing.