Richard W Clutter

US Patent:

20140016237, Jan 16, 2014

Filed:

Jul 16, 2012

Appl. No.:

13/550142

Inventors:

Robert S. Wright - Spring TX, US
Nam Nguyen - Houston TX, US
Richard W. Clutter - Houston TX, US

International Classification:

H02H 3/00

US Classification:

361 88

Abstract:

A protective circuit compares at least two different signals and asserts a control node toward respective logic states accordingly. At least one of the signals is derived from a voltage on a power rail within a computer or other device. A switching element passes or isolates an enable signal based on the logic state of the control node, enabling or preventing operation of a power supply, accordingly. Central processing units (CPUs) or other elements are protected against electrically caused damage in the event that a fault is detected by the protective circuit.

US Patent:

20130208384, Aug 15, 2013

Filed:

Feb 14, 2012

Appl. No.:

13/396258

Inventors:

Robert S. Wright - Spring TX, US
Nam Nguyen - Houston TX, US
Richard W. Clutter - Highlands TX, US

International Classification:

H02H 3/24

US Classification:

361 92

Abstract:

Apparatus and methods related to limiting surge current are provided. An under-voltage condition on a node is sensed and respective signals are provided in response. The under-voltage condition correlates to a surge in load current drawn from the node. A foldback signal is provided to a power controller to adjust the voltage on the node. The foldback signal is nullified when the surge current condition has been curtailed. Printers, computers and other apparatus can include surge current-limiting accordingly.