Richard Peter Dickson

US Patent:

7454532, Nov 18, 2008

Filed:

Apr 8, 2003

Appl. No.:

10/410657

Inventors:

Richard Dickson - Sunnyvale CA, US

Assignee:

Telairity Semiconductor, Inc. - Santa Clara CA

International Classification:

G06F 3/00
G06F 13/00
G06F 9/30

US Classification:

710 20, 710 5, 710 29, 710 31, 710 36, 712218

Abstract:

Techniques are provided for processing data in real-time or near real-time using a processor. The processor passes the real-time input data directly to functional units via a bypass multiplexer without storing the data in memory. The functional units process the input data and provide output data. The output data of the functional units is transmitted outside the processor without being stored in memory. Alternatively, the output data of the functional units can be stored in memory in the processor. Input data that needs to be maintained in the processor for a period of time is stored in memory.

US Patent:

20060259737, Nov 16, 2006

Filed:

May 10, 2005

Appl. No.:

11/126522

Inventors:

Howard Sachs - Los Altos CA, US
Richard Dickson - Sunnyvale CA, US

Assignee:

Telairity Semiconductor, Inc. - Santa Clara CA

International Classification:

G06F 15/00

US Classification:

712005000

Abstract:

A vector processor includes a set of vector registers for storing data to be used in the execution of instructions and a vector functional unit coupled to the vector registers for executing instructions. The functional unit executes instructions using operation codes provided to it which operation codes include a field referencing a special register. The special register contains information about the length and starting point for each vector instruction. The processor includes a high speed memory access system to facilitate faster operation.

US Patent:

20060259807, Nov 16, 2006

Filed:

May 10, 2005

Appl. No.:

11/126500

Inventors:

Howard Sachs - Los Altos CA, US
Richard Dickson - Sunnyvale CA, US
Luigi Gregorio - San Jose CA, US

Assignee:

Telairity Semiconductor, Inc. - Santa Clara CA

International Classification:

G06F 1/04

US Classification:

713500000

Abstract:

An external data signal serves as the basis for clocking a processor. In particular, a processor clock signal is generated from the external data signal which has a frequency that is an integer multiple of the frequency (data rate) of the external data signal. In this way, metastable conditions arising from different clock signals can be avoided.