Richard L George

US Patent:

45568677, Dec 3, 1985

Filed:

Nov 1, 1982

Appl. No.:

6/438374

Inventors:

Richard E. George - Everett WA

Assignee:

John Fluke Mfg. Co., Inc. - Everett WA

International Classification:

H03K 1302

US Classification:

340347NT

Abstract:

A dual slope analog to digital (A/D) converter starts by auto zeroing and making a number of high speed A/D samples before auto zeroing again. A microprocessor causes output of the high speed samples for a bar graph and applies predetermined correction factors to allow accumulation of the high speed samples to provide a high accuracy numerical output.

US Patent:

51362511, Aug 4, 1992

Filed:

Jan 31, 1991

Appl. No.:

7/648277

Inventors:

Richard E. George - Everett WA
Glade B. Bacon - Everett WA
Richard D. Beckert - Everett WA

Assignee:

John Fluke Mfg. Co., Inc. - Everett WA

International Classification:

G01R 2726

US Classification:

324678

Abstract:

The capacitance of an unknown capacitor is measured with multimeter instrumentation employing a dual slope analog-to-digital converter. The initial voltage across the capacitor is measured and the capacitor is cyclically charged until the capacitor reaches a predetermined proportion of possible charge. The final voltage is measured. The voltage across the charging resistance is integrated over successive charging cycles to provide a value proportional to the charge delivered to the capacitor and this value is divided by the difference between the initial and final voltages.

US Patent:

49069969, Mar 6, 1990

Filed:

Dec 2, 1988

Appl. No.:

7/278878

Inventors:

Richard E. George - Everett WA

Assignee:

John Fluke Mfg. Co., Inc. - Everett WA

International Classification:

H03M 106

US Classification:

341118

Abstract:

There is provided according to the invention a method and apparatus for eliminating or minimizing the error due to amplifier offset or drift error in an integrating dual slope analog-to-digital converter. The converter is provided with a switching and control arrangement whereby the integrating capacitor is charged for one-half of the predetermined charging time as a function of the sum of the levels of the unknown signal and the error signal. The integrating capacitor is charged for the remaining half of the predetermined time period as a function of the difference of the levels of the unknown signal and the error signal so that the capacitor reaches a level of charge which is a function of the level of the unknown signal substantially unaffected by the level of the error signal. During deintegration of the capacitor by a reference signal the polarity of the error signal is inverted during successive or consecutive deintegration cycles so that the error voltage is self-cancelling in two successive deintegrations and is eliminated from the summed digital output.

US Patent:

RE344281, Nov 2, 1993

Filed:

Mar 6, 1992

Appl. No.:

7/846442

Inventors:

Richard E. George - Everett WA
A. Brinkley Barr - Everett WA
Thomas W. Wiesmann - late of Lynnwood WA

Assignee:

John Fluke Mfg. Co., Inc. - Everett MI

International Classification:

H03M 106

US Classification:

341118

Abstract:

There is provided according to the invention a method and apparatus for eliminating or minimizing the error due to amplifier offset or drift error in an integrating dual slope analog-to-digital converter. The converter is provided with a switching and control arrangement whereby the integrating capacitor is charged for one-half of the predetermined charging time as a function of the sum of the levels of the unknown signal and the error signal. The integrating capacitor is charged for the remaining half of the predetermined time period as a function of the difference of the levels of the unknown signal and the error signal so that the capacitor reaches a level of charge which is a function of the level of the unknown signal substantially unaffected by the level of the error signal. During deintegration of the capacitor by a reference signal the polarity of the error signal is inverted during successive or consecutive deintegration cycles so that the error voltage is self-cancelling in two successive deintegrations and is eliminated from the summed digital output.

US Patent:

51422212, Aug 25, 1992

Filed:

Nov 23, 1990

Appl. No.:

7/615169

Inventors:

Glen A. Meldrum - Mountlake Terrace WA
Glade B. Bacon - Everett WA
Richard E. George - Everett WA

Assignee:

John Fluke Mfg. Co., Inc. - Everett WA

International Classification:

G01R 1900

US Classification:

324115

Abstract:

A digital multimeter having automatic function selection capability includes a signal type detector and an analog-to-digital converter formed as an application specific integrated circuit. The signal type detector has a comparator circuit that compares the analog input signal to be measured with predetermined thresholds and stores the resulting values, which are related to the type of analog input signal, in a memory that is also a part of the signal type detector. A controller executes an automatic function selection program that causes the controller to read the stored values and generate a corresponding function code, which causes an analog-to-digital converter to be configured to perform an appropriate conversion function on the analog input signal. When a change in the type of analog input signal is sensed, the controller aborts the present measurement cycle and proceeds with a next measurement cycle in which the changed analog input signal is measured. The controller also produces a change alert signal to indicate that a change in signal type has occurred.

US Patent:

50737570, Dec 17, 1991

Filed:

Sep 23, 1988

Appl. No.:

7/248489

Inventors:

Richard E. George - Everett WA

Assignee:

John Fluke Mfg. Co., Inc. - Everett WA

International Classification:

G01R 2726

US Classification:

324677

Abstract:

An apparatus for and a method of measuring capacitance employs a charge measuring system. While a capacitive element, which may be an unknown capacitor, is charged completely to a predetermined voltage, a charge proportional to the capacitance of the capacitive element is accumulated on the feedback capacitor of an integrating operational amplifier. Thereafter, the charge is measured by measuring the time required to completely remove the charge from the feedback capacitor using the same predetermined voltage as a reference. In a preferred embodiment, the present invention is manifested as a capacitance measurement feature in a hand-held multimeter wherein a largely conventional dual-slope analog-to-digital converter is employed as the charge measuring system.

US Patent:

51190192, Jun 2, 1992

Filed:

Nov 28, 1989

Appl. No.:

7/442243

Inventors:

Richard E. George - Everett WA

Assignee:

John Fluke Mfg. Co., Inc. - Everett WA

International Classification:

G01R 1508

US Classification:

324115

Abstract:

Disclosed is a digital multimeter having an automatic function selection capability. The device includes a sensing circuit connected to its input to respond to the type of analog signal which is sensed and to provide logic signals which are characteristic thereof. These logic signals may be utilized to cause generation of encoding signals to encode and dispose the converter circuit to perform the desired conversion function and provide the desired display as a function of the analog input. The device may include an internal reference signal source such as a DC reference potential and the sensing circuit may sense a differential between such reference source and the external analog signal to make a determination to utilize or disconnect the reference signal source in performing the function dictated by the nature of the analog signal.