Richard O Griffith

US Patent:

61337641, Oct 17, 2000

Filed:

Jan 27, 1999

Appl. No.:

9/238773

Inventors:

Richard S. Griffith - Chandler AZ
Robert L. Vyne - Tempe AZ
Thomas A. Somerville - Tempe AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03K 522

US Classification:

327 65

Abstract:

A comparator circuit (10) with hysteresis having transistors with the same threshold voltage and a method for comparing input signals. The comparator circuit (10) includes a current mirror (11) coupled to a common electrode differential pair (12) and to a feedback circuit (13). The current mirror (11) has a large output impedance and provides a plurality of output currents (I. sub. 21, I. sub. 26, I. sub. 31). Some (I. sub. 21, I. sub. 26) of the currents are transmitted to the common electrode differential pair and one (I. sub. 31) of the currents is transmitted to the feedback circuit (13). The output currents (I. sub. 21, I. sub. 26, I. sub. 31) are modulated to generate positive feedback signals that control changing the output state of the comparator circuit (10) as well as provide hysteresis for the comparator circuit (10).

US Patent:

6144569, Nov 7, 2000

Filed:

Feb 29, 2000

Appl. No.:

9/514800

Inventors:

David Rodriguez - Phoenix AZ
Richard S. Griffith - Chandler AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H02M 100

US Classification:

363 49

Abstract:

A power cut detection and recovery system (36) provides for the recovery of an electronic apparatus (20) in response to a momentary interruption in the voltage level of a power supply (46) coupled to that apparatus. The system includes a level detecting circuit (80) coupled to the power supply (46) for monitoring the voltage supplied to the apparatus (20). The system further includes internal reference supply circuits (86) that provide voltage and current references to operate the apparatus (20). A power cut monitor and reference control circuit (84) is coupled to the level detecting circuit (80) and is capable of causing the internal reference supply circuits (86) to remain enabled upon the detection of a momentary cut in the externally supplied power (46). A second level detecting circuit (90), dependent on the internal reference supply circuits (86), and the power cut monitor and reference control circuit (84) are coupled to an under voltage monitor and recovery circuit (88) that can cause the apparatus (20) to restart upon the recovery of the voltage level to a value above a predetermined level. By maintaining the internal reference supply circuits (86) in an enabled state, the apparatus (20) is able to restart in its pre-interruption state if the voltage level remains above a POR level.

US Patent:

57265976, Mar 10, 1998

Filed:

Aug 30, 1996

Appl. No.:

8/706095

Inventors:

Thomas D. Petty - Tempe AZ
Richard S. Griffith - Chandler AZ
Robert L. Vyne - Tempe AZ
Robert N. Dotson - Chandler AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03K 522

US Classification:

327307

Abstract:

A trim circuit (10) and method of reducing offset voltages in a differential input stage. The differential input transistors (32 and 42) have separate bulk terminals for receiving a voltage to compensate for the input offset voltage. A current source (60) supplies a static current to the offset compensation circuit for generating a bias voltage at node (55). The transistors (64 and 66) receive a voltage at input terminals (30 and 40) and supply an additional current to an offset compensation circuit (20). A switch circuit (50) has switch pairs (52, 56, and 54, 58) for transferring a voltage to the bulk terminal of one of the differential transistors (32 and 42) while grounding the bulk terminal of the other transistor. The differential voltage supplied across the bulk terminals of transistors (32 and 42) changes the threshold voltage of the transistors reducing the offset voltage of the input stage.

US Patent:

57342962, Mar 31, 1998

Filed:

Mar 19, 1996

Appl. No.:

8/618671

Inventors:

Robert N. Dotson - Chandler AZ
Richard S. Griffith - Chandler AZ
Robert L. Vyne - Tempe AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03F 345
H03F 316

US Classification:

330253

Abstract:

Low voltage operational amplifier (10) operates in a voltage range of one to eight volts over a temperature range of 0. degree. to 70. degree. centigrade. Op amp input stage (12) uses N-channel depletion-mode MOSFETs to provide amplification of the differential input and maintain constant transconductance. Source follower MOSFET (13) provides unity gain in transferring the AC signal, STAGE-1 OUTPUT, to the base of current sinking transistor (18). Sink control circuit (14) and source control circuit (22) generate the base drive currents for transistors (18) and (24). The signal at the output of MOSFET (13) either causes the sink transistor (18) to sink current or the signal to be transposed by means of a translinear loop (16) and causes the source transistor (24) to source current. An output stage provides approximately fifty milliamps of current drive and is quiescent until the output driver is selected.

US Patent:

57986738, Aug 25, 1998

Filed:

Mar 19, 1996

Appl. No.:

8/619446

Inventors:

Richard S. Griffith - Chandler AZ
Thomas D. Petty - Tempe AZ
Robert L. Vyne - Tempe AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03F 345
H03F 330

US Classification:

330255

Abstract:

Low voltage operational amplifier (10) operates in a voltage range of one to eight volts over a temperature range of 0. degree. to 70. degree. centigrade. Op amp input stage (12) uses N-channel depletion-mode MOSFETs to provide amplification of the differential input and maintain constant transconductance. Source follower MOSFET (13) provides unity gain in transferring the AC signal, STAGE-1 OUTPUT, to the base of current sinking transistor (18). Sink control circuit (14) and source control circuit (22) generate the base drive currents for in transistors (18) and (24). The signal at the output of MOSFET (13) either causes the sink transistor (18) to sink current or the signal to be transposed by means of a translinear loop (16) and causes the source transistor (24) to source current.

US Patent:

56990154, Dec 16, 1997

Filed:

Mar 19, 1996

Appl. No.:

8/618544

Inventors:

Robert N. Dotson - Chandler AZ
Richard S. Griffith - Chandler AZ
Thomas D. Petty - Tempe AZ
Robert L. Vyne - Tempe AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03F 345
H03F 326
H03F 316

US Classification:

330255

Abstract:

Low voltage operational amplifier (10) operates in a voltage range of one to eight volts over a temperature range of 0. degree. to 70. degree. centigrade. Op amp input stage (12) uses N-channel depletion-mode MOSFETs to provide amplification of the differential input and maintain constant transconductance. Source follower MOSFET (13) provides unity gain in transferring the AC signal, STAGE-1 OUTPUT, to the base of current sinking transistor (18). Sink control circuit (14) and source control circuit (22) generate the base drive currents for transistors (18) and (24). The signal at the output of MOSFET (13) either causes the sink transistor (18) to sink current or the signal to be transposed by means of a translinear loop (16) and causes the source transistor (24) to source current.

Address:

8700 Harvest Vly Ave, Las Vegas, NV 89129

VIN:

1FMFK20547LA11549

Make:

FORD

Model:

EXPEDITION EL

Year:

2007