Richard E Mann

US Patent:

20030198341, Oct 23, 2003

Filed:

Apr 23, 2002

Appl. No.:

10/127921

Inventors:

Christopher Smith - Mission Viejo CA, US
Richard Mann - Costa Mesa CA, US

Assignee:

ADC DSL Systems, Inc.

International Classification:

H04M001/00
H04M009/00

US Classification:

379/413030, 379/399010

Abstract:

An integrated plain old telephone service (POTS) and metallic loop testing (MLT) card provides lifeline telephone service with multiple channel data service. The integrated card can be piggybacked with an ADSL card to provide a single package of POTS, MLT, and ADSL services.

US Patent:

20070001101, Jan 4, 2007

Filed:

Sep 28, 2005

Appl. No.:

11/238425

Inventors:

Raj Sundararaman - Mission Viejo CA, US
Chi-Shao Lin - Mission Viejo CA, US
Jiafu Luo - Irvine CA, US
Richard Mann - Torrance CA, US
Zeynep Toros - Aliso Viejo CA, US

Assignee:

ESS Technology, Inc. - Fremont CA

International Classification:

H01J 40/14

US Classification:

25021400R

Abstract:

An electronic device is provided such as a programmable rise/fall time control circuit, for example, that delivers a continuous and near linear rising/falling slope of a control signal, with programmability that can be implemented in future CMOS image sensor devices. This device includes a programmability block for reset or transfer gate signals. The programmability block includes two inputs: an input bias current and a signal from the control bits. The programmability block further includes two similar internal circuit blocks, one for generating a fall time control signal, and one for generating a rise time control signal. Additionally the programmability block includes two outputs; a fall time control signal, and a rise time control signal. The device further includes a reset or transfer gate buffer configured as an inverter. The reset or transfer gate buffer includes three input signals: The fall time control signal and rise time control signal from the programmability block, and an INT Reset signal. Furthermore, the reset or transfer gate buffer includes an output reset or transfer gate signal. The device is configured to take an input bias current, and by controlling the transconductance of internal circuitry provide a tapered rise and fall time signal to a reset or transfer gate of a CMOS image sensor that is programmable.