Richard Long Nguyen

US Patent:

59200650, Jul 6, 1999

Filed:

Nov 14, 1997

Appl. No.:

8/970328

Inventors:

Chen-Kuo Sun - San Diego CA
Ching T. Chang - San Diego CA
Donald J. Albares - San Diego CA
Richard Nguyen - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

H01J 4014

US Classification:

2502141

Abstract:

The optoelectronic switch of the present invention comprises two PIN diodes onnected in series with opposed polarity having their intrinsic regions coupled to a light source for maintaining both diodes in the conductive state while the light source is on and in the non-conductive state while the light source is off.

US Patent:

47696834, Sep 6, 1988

Filed:

Jun 22, 1987

Appl. No.:

7/064629

Inventors:

Herbert Goronkin - Scottsdale AZ
George N. Maracas - Tempe AZ
Richard Nguyen - San Diego CA

Assignee:

Motorola Inc. - Schaumburg IL

International Classification:

H01L 2712

US Classification:

357 4

Abstract:

A quasi 1-dimensional electron gas transistor has been provided having a source electrode and a drain electrode. A plurality of electrodes are positioned between the source and drain electrodes in a manner which are parallel to the electron flow between the source and the drain electrodes. In one embodiment, the electrodes are interconnected by a gate electrode while in an alternate embodiment all the electrodes are connected to the source electrode and insulated from the gate electrode. This device provides a quantum wire for quasi 1-dimensional electron flow.

US Patent:

52486265, Sep 28, 1993

Filed:

Aug 28, 1992

Appl. No.:

7/937916

Inventors:

Richard Nguyen - San Diego CA
Charles A. Hewett - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy

International Classification:

H01L 21265

US Classification:

437 41

Abstract:

A method for fabricating a self-aligned, gate diffused junction field eff transistor is provided which includes the steps of forming an n-type layer on an indium phosphide, semi-insulating substrate; forming spaced apart source/drain metal contacts on the n-type layer; forming a metal gate on the n-type layer between the spaced apart source/drain contacts, where the metal gate is insulated from the source/drain contacts and includes a metallic p-type dopant material; and forming a p-type region in the n-type layer beneath the metal gate so that the gate contact and the p-type region have coincident boundaries with respect to each other at the surface of the n-type layer. The method may also be employed to manufacture a bipolar transistor by allowing the self-aligned and diffused p-type region to extend through the n-type layer to the semi-insulating substrate.

US Patent:

H12874, Feb 1, 1994

Filed:

Jun 16, 1992

Appl. No.:

7/901615

Inventors:

Carl R. Zeisse - San Diego CA
James R. Zeidler - San Diego CA
Charles A. Hewett - San Diego CA
Richard Nguyen - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

H01L 2978

US Classification:

257410

Abstract:

A field effect transistor comprises a diamond substrate which has a p-type ion implanted region coterminous with a surface of the diamond substrate, wherein the ion implanted region has a hole concentration in the range of 1. times. 10. sup. 15 to 1. times. 10. sup. 17 holes/cm. sup. 2, and a hole mobility equal to or greater than 1 cm. sup. 2 /V-sec; spaced apart source and drain electrodes formed over the p-type ion implanted region on the surface of the diamond substrate; an electrically insulating material formed over the p-type ion implanted region on the surface of the diamond substrate between the source and drain electrodes; and a gate electrode formed on the surface of the insulating material.

US Patent:

60781114, Jun 20, 2000

Filed:

Dec 23, 1997

Appl. No.:

8/997296

Inventors:

Chen-Kuo Sun - Escondido CA
Ching T. Chang - San Diego CA
Richard Nguyen - San Diego CA
Donald J. Albares - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

H01H 3500

US Classification:

307117

Abstract:

An optoelectronic switch for switching an input signal comprises two PIN des connected in series with opposed polarity, an input signal choke connected to the PIN diodes for presenting a high impedance to the input signal and a low impedance to a PIN diode bias, and a photovoltaic cell connected to the PIN diodes and the input signal choke for generating the PIN diode bias to switch the PIN diodes between a substantially conductive state while the photovoltaic cell receives optical energy from a light source and a substantially non-conductive state while the photovoltaic cell does not receive optical energy from the light source.

US Patent:

50117858, Apr 30, 1991

Filed:

Oct 30, 1990

Appl. No.:

7/605623

Inventors:

Richard Nguyen - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

H01L 2104

US Classification:

437 41

Abstract:

A high transconductance, low capacitance, low leakage compound semiconduc junction field effect transistor (JFET) enhances the low leakage current while having the advantages of a self-aligned JFET including low capacitance and low source-drain resistance. The diffused junction of the JFET is totally covered during the process of manufacture. An n channel on a substrate has a layer of photoresist placed over it and exposed to leave a predefined pattern of photoresist. The patterned photoresist is used as a mask so that part of the n-channel layer is etched down to a desired depth leaving a wedge-shaped region. A layer of insulator, such as silicon dioxide, is deposited over the entire substrate and sides of the w edge-shaped region in insulator regions. Next, the photoresist is then removed. A p. sup. + diffusion or implant is performed in the wedge-shaped region to create a p. sup.

US Patent:

20190353564, Nov 21, 2019

Filed:

May 21, 2018

Appl. No.:

15/985020

Inventors:

- Cupertino CA, US
Richard Nguyen - Denver CO, US
Jonathan P. Jones - Longmont CO, US
Sumit Chandra - Longmont CO, US

International Classification:

G01N 1/24
G01N 1/22

Abstract:

Aspects of the disclosure are directed to apparatuses and methods involving particulate sampling. As may be consistent with one or more embodiments, an apparatus includes a flow direction structure, a flow sampler and a particle collector having a collecting surface. The flow direction structure has interior sidewalls that direct the flow of particulate-laden gas along a flow path. The flow sampler is located in the flow path within the interior sidewalls, and operates with the flow direction structure to sample a portion of the particulate-laden gas at a reduced velocity, while allowing another portion of the particulate-laden gas to exhaust around the flow sampler. The flow sampler operates with the particle collector to direct the sampled portion of the particulate-laden gas to the collecting surface, and to adhere particulates from the particulate-laden gas to the collecting surface.

US Patent:

20180172987, Jun 21, 2018

Filed:

Dec 16, 2016

Appl. No.:

15/381359

Inventors:

- San Diego CA, US
Ryan P. Lu - San Diego CA, US
Richard Nguyen - Escondido CA, US
Ayax D. Ramirez - Chula Vista CA, US

Assignee:

United States of America as represented by Secretary of the Navy - San Diego CA

International Classification:

G02B 27/00
G02B 7/04
G02B 23/00

Abstract:

A system and method for focus-stacking images that results in a clearer image, particularly where objects in the image are at different depths of field. The system and method may be used in connection with, or made a part of, an imaging system, including a telescope, camera, binoculars or other imaging system. The system and method incorporate one or more focus-altering devices that alter the focus of an image produced by the imaging system. The system and method also incorporate a modulation device that modulates between two or focal planes, thereby resulting in a focus-stacked image that is a combination of two or more focal planes.