Richard M Turner

US Patent:

6369853, Apr 9, 2002

Filed:

Nov 13, 1997

Appl. No.:

08/969383

Inventors:

Richard B. Merrill - Woodside CA
Richard M. Turner - Menlo Park CA
Carver A. Mead - Cupertino CA
Richard F. Lyon - Los Altos CA

Assignee:

Foveon, Inc. - Santa Clara CA

International Classification:

H04N 314

US Classification:

348302, 348308, 348310, 2502081, 257223, 257291, 257258, 257445

Abstract:

A storage pixel sensor disposed on a semiconductor substrate comprises a capacitive storage element having a first terminal connected to a fixed potential and a second terminal. A photodiode has an anode connected to a first potential and a cathode. A semiconductor reset switch has a first terminal connected to the cathode and a second terminal connected to a reset potential. A semiconductor transfer switch has a first terminal connected to the cathode and a second terminal connected to the second terminal of the capacitive storage element. A semiconductor amplifier has an input connected to the capacitive storage element and an output. The semiconductor reset switch and the semiconductor transfer switch each have a control element connected to a control circuit for selectively activating the semiconductor reset switch and the semiconductor transfer switch. A light shield is disposed over portions of the semiconductor substrate comprising a circuit node including the second terminal of the semiconductor transfer switch, the second terminal of the capacitive storage element and the input of the semiconductor amplifier and to prevent substantially all photons from entering the circuit node. Structures are present for preventing substantially all minority carriers generated in the semiconductor substrate from entering the circuit node.

US Patent:

6410899, Jun 25, 2002

Filed:

Feb 14, 2000

Appl. No.:

09/492103

Inventors:

Richard B. Merrill - Woodside CA
Richard M. Turner - Menlo Park CA
Milton B. Dong - Saratoga CA
Richard F. Lyon - Los Altos CA

Assignee:

Foveon, Inc. - Santa Clara CA

International Classification:

H04N 314

US Classification:

2502081, 348308

Abstract:

An integrated active pixel sensor array comprises a plurality of row select lines, each of said row select lines coupled to a source of a row-select signal; a plurality of source-follower drain row lines, each of said source-follower drain row lines coupled to a source of a source-follower drain row signal; a plurality of column output lines; a reset line coupled to a source of a reset signal; a source of reset potential; and a plurality of active pixel sensors, each pixel sensor associated with one row and one column of the array and including a photodiode having a first terminal coupled to a first reference potential and a second terminal, a Reset transistor having a gate coupled to the reset line, a drain coupled to the reset potential to reverse bias the photodiode, and a source coupled to the second terminal of the photodiode, a Source-Follower transistor having a gate coupled to the second terminal of the photodiode, a drain connected to the one of the plurality of source-follower drain row lines with which its active pixel sensor is associated, and a source, a Row-select transistor having a gate coupled to the one of the plurality of row-select lines with which its active pixel sensor is associated, a drain coupled to the source of the Source-follower transistor, and a source coupled to the one of the plurality of column output lines with which its active pixel sensor is associated.

US Patent:

6512858, Jan 28, 2003

Filed:

Jul 21, 1998

Appl. No.:

09/120491

Inventors:

Richard F. Lyon - Los Altos CA
Richard M. Turner - Menlo Park CA
Richard B. Merrill - Woodside CA

Assignee:

Foveon, Inc. - Santa Clara CA

International Classification:

G06K 960

US Classification:

382305, 382312, 250553

Abstract:

A scanning circuit for use with an active pixel sensor array comprises a row-address generator configured to start at a selected row-start address, stop at a selected row-stop address, and increment row addresses by a factor K. A column-address generator is configured to start at a selected column-start address, stop at a selected column stop address, and increment column addresses by a factor K. Circuitry is coupled to the row address generator and the column address generator, for storing the row-start address, the row-stop address, the column-start address, the column-stop address and the factor K. A row decoder is coupled to the row-address generator and a column selector is coupled to the column-address generator. A plurality of row select lines are coupled to the row decoder, each one of the row select lines associated with a different row in the active pixel sensor array. A plurality of column output lines are coupled to the column selector, each one of the column output lines associated with a different column in the active pixel sensor array.

US Patent:

6525304, Feb 25, 2003

Filed:

Nov 28, 2000

Appl. No.:

09/724258

Inventors:

Richard B. Merrill - Woodside CA
Richard F. Lyon - Los Altos CA
Richard M. Turner - Mountain View CA
Milton B. Dong - Saratoga CA

Assignee:

Foveon, Inc. - Santa Clara CA

International Classification:

H01L 2700

US Classification:

2502081, 348308

Abstract:

A digital pixel sensor is formed on a semiconductor substrate and comprises a phototransducer responsive to light for providing an analog output signal that is a function of an incident amount of light. A comparator is configured to compare the analog output signal and a ramp reference signal. A plurality of n DRAM cells are configured to store an at least n-bit digital signal in response to the output of the comparator. An array of digital pixel sensors is also disclosed.

US Patent:

6741283, May 25, 2004

Filed:

Nov 28, 2000

Appl. No.:

09/724393

Inventors:

Richard B. Merrill - Woodside CA
Richard M. Turner - Menlo Park CA
Carver A. Mead - Cupertino CA
Richard F. Lyon - Los Altos CA

Assignee:

Foveon, Inc. - Santa Clara CA

International Classification:

H04N 314

US Classification:

348308, 348297, 2502081, 257292

Abstract:

A storage pixel sensor disposed on a semiconductor substrate comprises a capacitive storage element having a first terminal connected to a fixed potential and a second terminal. A photodiode has an anode connected to a first potential and a cathode. A semiconductor reset switch has a first terminal connected to the cathode and a second terminal connected to a reset potential. A semiconductor transfer switch has a first terminal connected to the cathode and a second terminal connected to the second terminal of the capacitive storage element. A semiconductor amplifier has an input connected to the capacitive storage element and an output. The semiconductor reset switch and the semiconductor transfer switch each have a control element connected to a control circuit for selectively activating the semiconductor reset switch and the semiconductor transfer switch. A light shield is disposed over portions of the semiconductor substrate comprising a circuit node including the second terminal of the semiconductor transfer switch, the second terminal of the capacitive storage element and the input of the semiconductor amplifier and to prevent substantially all photons from entering the circuit node. Structures are present for preventing substantially all minority carriers generated in the semiconductor substrate from entering the circuit node.

US Patent:

6760070, Jul 6, 2004

Filed:

Mar 16, 2000

Appl. No.:

09/527107

Inventors:

Richard B. Merrill - Woodside CA
Richard M. Turner - Menlo Park CA
Milton B. Dong - Saratoga CA
Richard F. Lyon - Los Altos CA

Assignee:

Foveon, Inc. - Santa Clara CA

International Classification:

H04N 5335

US Classification:

348294, 348300, 348302, 348308, 2502081

Abstract:

An integrated active pixel sensor array arranged in a plurality of rows and columns comprises a saturation level line coupled to a source of saturation level control voltage, a global current-summing node. A plurality of active pixel sensors is disposed in the array, each pixel sensor associated with one row and one column of the array and including a photodiode having a first terminal coupled to a first potential and a second terminal, a reset transistor having a first terminal coupled to the second terminal of the photodiode, a second terminal coupled to a reset reference potential that reverse biases the photodiode, and a control gate coupled to the reset line, a photocharge integration node coupled to the second terminal of the photodiode, the photocharge integration node comprising the gate of a first source-follower transistor, the first source-follower transistor having a drain, coupled to a first source-follower drain line, and a source, a circuit for generating a bias current at the source of the first source follower transistor, and an exposure transistor having a source coupled to the source of the first source-follower transistor, a drain coupled to the global current-summing node and a control gate coupled to the saturation level line.

US Patent:

6794627, Sep 21, 2004

Filed:

Oct 24, 2001

Appl. No.:

10/001438

Inventors:

Richard F. Lyon - Los Altos CA
Robert S. Hannebauer - Sunnyvale CA
Richard M. Turner - Mountain View CA
Carver A. Mead - Santa Clara CA

Assignee:

Foveon, Inc. - Santa Clara CA

International Classification:

H04N 314

US Classification:

2502081, 348308, 250214 A

Abstract:

An image sensor includes a plurality of active pixel sensors arranged in an array. Each active pixel sensor includes a photosensor that generates a sensor signal nominally indicative of an intensity of light incident on the photosensor and a follower-type amplifier that couples the sensor signal to an output of the active pixel sensor to provide a buffered sensor signal. A column line is provided for each column in the array, and each column line is coupled to the output of the active pixel sensors associated with that column. Row select signal generating circuitry is configured to substantially simultaneously select a set of plural particular rows of the array such that each of the active pixel sensors in the selected set of plural particular rows substantially simultaneously provides the buffered sensor signal for that pixel sensor to the column line for the column to which that pixel sensor belongs such that an output node of the column line indicates a collective output signal for the active pixel sensors in the selected set of plural particular rows, belonging to that column. Column select signal generating circuitry configured to substantially simultaneously select a set of plural particular columns of the array such that the output nodes for the selected plural particular columns are substantially simultaneously coupled to an output node of the image sensor.

US Patent:

6841816, Jan 11, 2005

Filed:

Jan 31, 2003

Appl. No.:

10/355940

Inventors:

Richard B. Merrill - Woodside CA, US
Richard F. Lyon - Los Altos CA, US
Richard M. Turner - Mountain View CA, US
Robert S. Hannebauer - Sunnyvale CA, US
Russel A. Martin - Menlo Park CA, US

Assignee:

Foveon, Inc. - Santa Clara CA

International Classification:

H01L 31113

US Classification:

257294, 257432, 257440, 257443

Abstract:

A vertical color filter sensor group formed on a substrate (preferably a semiconductor substrate) and including at least two vertically stacked, photosensitive sensors. In preferred embodiments, the sensor group includes at least one filter positioned relative to the sensors such that radiation that has propagated through or reflected from the filter will propagate into at least one sensor. Preferably, the filter is or includes a layer that has been integrated with the sensors by a semiconductor integrated circuit fabrication process. In other embodiments, the sensor group includes a micro-lens. Other aspects of the invention are arrays of vertical color filter sensor groups, some or all of which include at least one filter or micro-lens, and methods for fabricating vertical color filter sensor groups and arrays thereof.