Robert E Drury

US Patent:

7463131, Dec 9, 2008

Filed:

Apr 21, 2005

Appl. No.:

11/111660

Inventors:

Kyuwoon Hwang - Palo Alto CA, US
Peter J. Hopper - San Jose CA, US
Robert Drury - Palo Alto CA, US
Peter Johnson - Sunnyvale CA, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

H01F 5/00

US Classification:

336200

Abstract:

An on-chip inductor structure includes top and bottom metal plates that are formed to surround a conductor coil formed between the top and bottom plates, but is separated therefrom by intervening dielectric material. The top and bottom plates are preferably formed from a ferromagnetic alloy, e. g. Permalloy, and are subdivided into a plurality of space-apart segments, thereby reducing eddy currents. The number of segments is optimized based upon the process technology utilized to fabricate the structure. Preferably, a finite gap is formed between the top plate and the bottom plate, the height of the gap being chosen to adjust the total inductance of the structure.