Vijay Jaswa - Sunnyvale CA, US Jeffrey Kidd - Los Altos CA, US Robert Haragan - Los Altos CA, US Robert Ferrer - Sunnyvale CA, US
Assignee:
Alcatel USA Sourcing, Inc - DE
International Classification:
G06F 11/00
US Classification:
714 4, 710316
Abstract:
A method and system is provided to enable redundancy in the communication between a plurality of peripheral devices and redundant hosts through redundant switches. The peripheral devices and the host are connected through a Peripheral Component Interconnect Express (PCI-Express) architecture in a data processing system. In an embodiment of the invention, the system includes a switch, a redundant switch, and switch-level exchanging means. The switch-level exchanging means enables the exchange of data packets between the peripheral devices and the host, through an available switch. The available switch is either the switch or the redundant switch. In another embodiment of the invention, the system also includes a redundant host and host-level exchanging means. The host-level exchanging means enables the exchange of data packets between an available host and the available switch. The available host is either the host or the redundant host.
Dr. Ferrer graduated from the Hahnemann University School of Medicine in 1986. He works in San Antonio, TX and specializes in Family Medicine. Dr. Ferrer is affiliated with University Hospital.
Netdevices Feb 2004 - Apr 2007
Hardware Engineer
Corona Direct Jan 2001 - Aug 2003
Hardware Design Engineer
Zhone Technologies Jun 2000 - Dec 2000
Senior Hardware Engineer
Nortel Jun 1997 - Jun 2000
Member of Technical Staff
Micom Communications Corp Jun 1992 - Aug 1997
Staff Engineer
Education:
California State University, Northridge 1991 - 1994
Bachelor of Engineering, Bachelors, Bachelor of Science, Electronics Engineering
Skills:
Debugging Embedded Systems Device Drivers Ethernet Vxworks Digital Signal Processors Embedded Software Fpga Hardware Hardware Architecture Telecommunications Usb Tcp/Ip Soc Rtos Computer Hardware Field Programmable Gate Arrays Verilog Arm Architecture Pcie Firmware