Robert Francis Goodman

US Patent:

47018658, Oct 20, 1987

Filed:

Jun 25, 1984

Appl. No.:

6/624175

Inventors:

Robert W. Goodman - Hopkinton MA

Assignee:

Data General Corporation - Westboro MA

International Classification:

G06F 314

US Classification:

364521

Abstract:

A video control section for a data processing system for controlling a CRT display is disclosed. The video control section includes a video memory comprising an array of dual port RAMS which is connected through an interface to the system memory bus, a shifter, a palette, a D/A converter, an oscillator section, a timing and synchronizer section and a microprocessor. The microprocessor, which is connected to the system memory bus through an interface, manages the overall operations of the video control section to generate video signals for the CRT display and in addition along with the oscillator section and timing and synchronizer section generates all of the video timing and control signals for the CRT display.

US Patent:

47574437, Jul 12, 1988

Filed:

Jun 25, 1984

Appl. No.:

6/624077

Inventors:

Mark B. Hecker - Northborough MA
Robert W. Goodman - Hopkinton MA

Assignee:

Data General Corp. - Westboro MA

International Classification:

G06F 1312

US Classification:

364200

Abstract:

A data processing system which includes a central processing unit (CPU) to which is connected an I/O bus and a memory bus is disclosed. The data processing system further includes an I/O controller and a video control section. The I/O controller includes a terminal control section which is connected to the CPU through an RS232 Cable, an I/O control section which is connected to the I/O bus over a single line and a single processor for managing both the terminal control section and the I/O control section. The I/O control section includes a plurality of interface and control subsystems each for use with a separate peripheral device and an I/O bus interface and control subsystem. The terminal control section includes a video control section interface through which data is sent directly to the video control section over a separate line, and a keyboard interface for interfacing the terminal control section to a keyboard. The video control section includes a video memory and a microprocessor which are both connected to the memory bus.