Robert O Griffith

US Patent:

6591392, Jul 8, 2003

Filed:

Nov 24, 1999

Appl. No.:

09/449014

Inventors:

Robert R. Griffith - San Jose CA
Gene E. Weddle - San Jose CA
Zongzhao Fei - San Jose CA

Assignee:

Oak Technology, Inc. - Sunnyvale CA

International Classification:

G11C 2900

US Classification:

714763, 369 32

Abstract:

A subcode processing circuit of an optical disc drive, and a method for processing subcode data are disclosed. The subcode processing circuit includes a shift register circuit for processing a plurality of standard subcode data bytes that are obtained from an optical disc media of the optical disc drive. The processing is configured to pack the plurality of standard subcode data bytes into a plurality of packed subcode data bytes. The plurality of packed subcode data bytes is configured to be less than the plurality of standard subcode data bytes. In one example, the shift register circuit is configured to include a plurality of shift registers and a multiplexer to assist in the processing. The subcode processing circuit is further configured to perform error correction for each byte of the plurality of packed subcode data bytes.

US Patent:

6128257, Oct 3, 2000

Filed:

Jan 22, 1999

Appl. No.:

9/235386

Inventors:

Ning Eric Zhou - Fremont CA
Steven E. Olson - San Jose CA
Robert Griffith - San Jose CA

Assignee:

Oak Technology, Inc. - Sunnyvale CA

International Classification:

G11B 1722

US Classification:

369 33

Abstract:

A personal computer capable of creating a table of contents (TOC) for a CD-ROM in response to receipt of lead-in Sub-channel Q data from a CD-ROM disc drive. The personal computer includes a computer readable memory storing a first and second set of instructions. The first set of instructions implement a read lead-in command to read lead-in Sub-channel Q data of the CD-ROM in the CD-ROM disc drive. The second set of instructions create a TOC and store the TOC in the computer readable memory in response to receipt of the lead-in Sub-channel Q data from the CD-ROM disc drive.

US Patent:

45876126, May 6, 1986

Filed:

Dec 22, 1982

Appl. No.:

6/516607

Inventors:

Dale E. Fisk - San Jose CA
Robert L. Griffith - San Jose CA
Merle E. Homan - Los Gatos CA
George Radin - Piermont NY
Waldo J. Richards - San Jose CA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 900

US Classification:

364200

Abstract:

If a predetermined field (FIG. 3/27) within a source instruction indexes and accesses a body of control information from memory (FIG. 2/5), and if control information (FIG. 4) designates the field-to-field (register-to-register) mapping (FIG. 6), then a skeleton target instruction (FIG. 3/29; FIG. 4) can be filled in by either selectively copying the fields of the source instruction or otherwise computing same. If the mapping is executed by an interposed independent processor then overlapping of such conversion enhances throughput, the independent processor converting multifield instructions for a CPU of a first kind to multifield instructions for a CPU of a second kind without disrupting the logical flow or execution of either source or target instruction streams.

US Patent:

61540668, Nov 28, 2000

Filed:

Dec 15, 1998

Appl. No.:

9/212743

Inventors:

Roy M. Wen - San Jose CA
Alan K. Ng - Sunnyvale CA
Robert R. Griffith - San Jose CA

Assignee:

Oak Technology, Inc. - Sunnyvale CA

International Classification:

H03K 522

US Classification:

327 65

Abstract:

An apparatus and method for interfacing integrated circuits having incompatible input-output signal offset voltages that is relatively inexpensive and yet is also insensitive to noise. The apparatus of the present invention includes a receiver circuit for receiving differential signals on a differential line, comprising: (1) an interface circuit coupled to the differential signal line for removing a first offset voltage from the differential signal and biasing the differential signal to generate a biased differential signal having a second offset voltage, the interface circuit including a plurality of capacitive devices, (2) a differential amplifier circuit coupled to the interface circuit for converting the biased differential signal into a single-ended signal, (3) a Schmitt trigger circuit coupled to the differential amplifier circuit for filtering the single-ended signal to generate a filtered single-ended signal and (4) a latch circuit coupled to the Schmitt trigger circuit for filtering and asynchronously latching the filtered single-ended signal to generate a sustained, filtered digital signal. The method of the present invention comprises the steps of: (1) capacitively removing a first offset voltage from the differential signal, (2) biasing the differential signal to generate a biased differential signal having a second offset voltage, (3) converting the biased differential signal into a single-ended signal, (4) filtering the single-ended signal using a hysteresis-loop transfer function to generate a filtered single-ended signal and (5) filtering and latching the filtered single-ended signal using a delayed regenerative feedback, hysteresis-loop transfer function to generate a sustained, filtered digital signal.

US Patent:

58085289, Sep 15, 1998

Filed:

Sep 5, 1996

Appl. No.:

8/708594

Inventors:

Robert K. Griffith - San Jose CA
Craig R. Solis - San Jose CA
Cheyenne M. Noda - Campbell CA
William F. Melody - Morgan Hill CA

Assignee:

Digital Microwave Corporation - San Jose CA

International Classification:

H01P 1207

US Classification:

333229

Abstract:

An inductive strip waveguide band-pass filter includes a conductive movable wall which can be set to various positions to allow a varying "A" dimension, thereby setting controllably the center frequency of the filter over a predetermined range. If the inductive strip filter includes multiple synchronized resonant cavities, the resonant cavities remain synchronized for all positions of the movable wall. The position of the movable wall can be set manually or by a motorized control mechanism.

US Patent:

61218545, Sep 19, 2000

Filed:

Apr 19, 1999

Appl. No.:

9/295468

Inventors:

Robert K. Griffith - San Jose CA
Roland Matian - San Jose CA

Assignee:

Digital Microwave Corporation - San Jose CA

International Classification:

H01P 512

US Classification:

333128

Abstract:

A power divider includes an input port, a first output port, a second output port, a first transformer coupled between the input port and the first output port, and a second transformer coupled between the input port and the second output port. The first and second transformers each incorporates a low pass filter. The power divider further includes a ground plate disposed adjacent to the first and second transformers. The ground plate is capacitively coupled to the low pass filters of the first and second transformers for enhancing the low pass filtering characteristics of the power divider. The power divider provides low pass filtering capability while achieving a significant size reduction over conventional power dividers.