Robert Alan Jacobs

US Patent:

6372974, Apr 16, 2002

Filed:

Jan 16, 2001

Appl. No.:

09/761513

Inventors:

Mark T. Gross - Portland OR
Robert A. Jacobs - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G10H 700

US Classification:

84609, 84600, 84649

Abstract:

A digital music player. The player includes a memory capable of storing music files. The player has a user interface allowing a user to select and access the music files. A port on the player allows the user to establish a connection to other digital music players. The user can then send and receive music files without an intervening host.

US Patent:

6684288, Jan 27, 2004

Filed:

Jun 6, 2000

Appl. No.:

09/588864

Inventors:

Robert A. Jacobs - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1200

US Classification:

711103, 711160

Abstract:

A NOR-gate architecture memory with an erase and write time table. The memory processor creates an erase and write time table in a table block. The table contains the most recent times for erase and write operations for each data block in the memory. When a storage operation is initiated, the processor accesses the table and estimates the amount of time it will take to perform the data storage operation and then communicates that back to a host computer. Each data storage operation results in a new table being created that is written into the data block. To save erase and write operations for the table block, the new table is written directly after the most recent table unless there is not enough space. An erase and write operation is only performed on the table block if there is not enough space for the new table.

US Patent:

6772253, Aug 3, 2004

Filed:

Dec 20, 2000

Appl. No.:

09/745336

Inventors:

Thomas M. Slaight - Beaverton OR
Thomas W. Erdman - Gig Harbor WA
Robert A. Jacobs - Portland OR
Douglas C. Mason - Olympia WA
Don J. Neuhengen - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1342

US Classification:

710105, 710313, 710315

Abstract:

System and method in a USB environment for providing secondary management channel access to a managed system via a communications device connected to the managed system. The communications device can be shared between management channel use and system use. A remote management system can connect directly to the platform management subsystem of the managed system and the channel provides a communications path to the platform management subsystem under conditions where the host processor(s) and system software are unavailable. A management controller simulates the presence of the communication device to the USB host when the management controller takes ownership of the communication device. For non-USB communication devices, the management controller also converts data from non-USB format to USB format and routes the converted data to the USB host.

US Patent:

6880038, Apr 12, 2005

Filed:

Dec 29, 2003

Appl. No.:

10/748600

Inventors:

Robert A. Jacobs - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F012/00

US Classification:

711103, 711156

Abstract:

A NOR-gate architecture memory with an erase and write time table. The memory processor creates an erase and write time table in a table block. The table contains the most recent times for erase and write operations for each data block in the memory. When a storage operation is initiated, the processor accesses the table and estimates the amount of time it will take to perform the data storage operation and then communicates that back to a host computer. Each data storage operation results in a new table being created that is written into the data block. To save erase and write operations for the table block, the new table is written directly after the most recent table unless there is not enough space. An erase and write operation is only performed on the table block if there is not enough space for the new table.

US Patent:

6957264, Oct 18, 2005

Filed:

Jun 13, 2000

Appl. No.:

09/593922

Inventors:

Robert A. Jacobs - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F015/16
H04J003/02

US Classification:

709231, 709234, 370537

Abstract:

A method and apparatus to quickly change and deliver Internet radio sources. The apparatus can receive multiple Internet radio sources simultaneously, and route each of the multiple Internet radio sources to a stream receiver. The stream receiver is operable to maintain connection with one of a multitude of Internet radio sources. Each of the sources can be buffered by a stream buffer that can receive data from one of each of the stream receivers. A stream selector can select one of the multiple Internet radio sources and deliver the selected one of the multiple Internet radio sources as output to a user. The apparatus can be implemented as part of a multiple function system such as a personal computer or as an Internet radio receiver apparatus.

US Patent:

7626358, Dec 1, 2009

Filed:

Dec 1, 2006

Appl. No.:

11/607070

Inventors:

Hue Lam - Portland OR, US
Robert Alan Jacobs - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H02J 7/00
A61B 5/00

US Classification:

320114, 320107, 600300

Abstract:

The invention includes a peripheral charging system for a computer. The peripheral charging system comprises a retention mechanism configured to retain a peripheral having a battery, the retention mechanism comprising a charging mechanism, and a system battery electrically connected to the charging mechanism. When the peripheral is retained by the retention mechanism, the peripheral contacts the charging mechanism of the retention mechanism to charge the peripheral battery. The invention also comprises a method for charging a peripheral for a mobile computing device. The method comprises retaining the peripheral in a retention mechanism of the mobile computing device, and charging a battery of the peripheral device from a battery of the mobile computing device. The retention mechanism of the mobile computing device includes a charging mechanism configured to supply charge to a charging mechanism of the peripheral.

US Patent:

7969117, Jun 28, 2011

Filed:

Nov 6, 2009

Appl. No.:

12/614115

Inventors:

Hue V. Lam - Portland OR, US
Robert Alan Jacobs - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H02J 7/00
A61B 5/00

US Classification:

320114, 320107, 320115, 600300

Abstract:

The invention includes a peripheral charging system for a computer. The peripheral charging system comprises a retention mechanism configured to retain a peripheral having a battery, the retention mechanism comprising a charging mechanism, and a system battery electrically connected to the charging mechanism. When the peripheral is retained by the retention mechanism, the peripheral contacts the charging mechanism of the retention mechanism to charge the peripheral battery. The invention also comprises a method for charging a peripheral for a mobile computing device. The method comprises retaining the peripheral in a retention mechanism of the mobile computing device, and charging a battery of the peripheral device from a battery of the mobile computing device. The retention mechanism of the mobile computing device includes a charging mechanism configured to supply charge to a charging mechanism of the peripheral.

US Patent:

20070006146, Jan 4, 2007

Filed:

Jun 24, 2005

Appl. No.:

11/165815

Inventors:

Wah Kwong - Beaverton OR, US
Prosenjit Ghosh - Portland OR, US
Katie Mills - Portland OR, US
Jim Trethewey - Hillsboro OR, US
Robert Jacobs - Portland OR, US
Tim Nguyen - Portland OR, US
Asim Sadiq - Santa Clara CA, US
Shreekant Thakkar - Portland OR, US
Murali Veeramoney - Beaverton OR, US
Truong Phan - Hillsboro OR, US

International Classification:

G06F 9/44

US Classification:

717114000

Abstract:

According to some embodiments, systems and apparatus for enhanced mobile computing platforms are provided. For example, an apparatus or system may comprise a universal computational package, comprising a processor, a memory coupled to the processor, a plurality of instructions stored in the memory directed to at least one specific use of the universal computational package, and a plurality of interface controllers coupled to the processor, wherein each of the plurality of interface controllers is operable to cause the processor to execute the plurality of stored instructions in accordance with the presence of a use-specific user interface cover associated with the at least one specific use of the universal computational package.