A limiting factor in the operating speed of a bit-serial integrated circuit is the stray capacitance associated with interconnections of functional elements on the integrated circuit, which stray capacitance tends to be significantly larger than capacitances at signal nodes internal to a functional element. To overcome the limitations imposed by the capacitance associated with the interconnections, bit-serial signals are coupled from one functional element to another by multiplexing circuitry which splits the bit-serial signal provided by a functional element into parallel bit-serial-signals of lesser bit-rate, and then recombines the parallel signals for application to another functional element.
Apparatus For Computing Interpolation Weighting Factor For Time Compression Or Expansion
William T. Mayweather III - Lawrenceville NJ Robert F. Nutter - Princeton NJ
Assignee:
RCA Licensing Corporation - Princeton NJ
International Classification:
H04N 712
US Classification:
358134
Abstract:
In the context of a video signal raster mapper, apparatus is disclosed to facilitate time compression or expansion by developing an auxiliary signal (DX) representing a fractional position of output pixel samples between input pixel samples. A multiplexer selectively applies values from two registers to an accumulator for controlling the accumulator value in a manner appropriate for compression or expansion.