Robert Manuel Ramirez

Address:

5807 Deer Horn Dr, San Antonio, TX 78238

VIN:

1FTFW1CV3AFB95726

Make:

FORD

Model:

F-150

Year:

2010

Address:

10707 W Interstate 10 APT 116, San Antonio, TX 78230

VIN:

5N1BA08A27N721917

Make:

NISSAN

Model:

ARMADA

Year:

2007

Address:

2747 Frst Spur, San Antonio, TX 78232

VIN:

3G5DA03L07S578016

Make:

BUICK

Model:

RENDEZVOUS

Year:

2007

Address:

3110 Devilbliss Ln LOT 4, San Antonio, TX 78264

VIN:

5J6YH18797L001623

Make:

HONDA

Model:

ELEMENT

Year:

2007

Address:

715 N Calaveras, San Antonio, TX 78207

VIN:

5NHUTB0167Y055445

Make:

Infiniti

Model:

QX56 4dr AWD

Year:

2007

US Patent:

6473772, Oct 29, 2002

Filed:

Dec 17, 1998

Appl. No.:

09/213913

Inventors:

Jason Raymond Baumgartner - Austin TX
Sriram Srinivasan Mandyam - Austin TX
Robert James Ramirez - New Braunfels TX
Brett Adam St. Onge - Austin TX
Kenneth Lee Wright - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1730

US Classification:

7071041, 707100, 703 17

Abstract:

A method and apparatus for dynamically driving events in a simulation of a data processing system are implemented. Events, or system states, are generated by drivers located at predetermined locations within the simulation model under test. These events, which are drawn from a predetermined class of events, termed âeffects,â are driven in response to other events observed by monitors disposed within the simulation model in accordance with a predetermined set of âcauses,â and a set of ârulesâ that map causes to effects. The driving of events is mediated by a library process that receives observed events from the monitors, in the form of data structures, stored them in a database, and passes the effects to be driven to the appropriate driver in accordance with the set of rules, also data structures stored in the database, when a cause corresponds to a observed event.

US Patent:

20110317102, Dec 29, 2011

Filed:

Feb 24, 2010

Appl. No.:

13/203412

Inventors:

Robert Ramirez - Mission Viejo CA, US
Shijun Zheng - San Diego CA, US
Zongcheng Jiang - Oceanside CA, US
Shuangxi Wang - Corona CA, US
Michiharu Yamamoto - Carlsbad CA, US

Assignee:

NITTO DENKO CORPORATION - OSAKA

International Classification:

G02F 1/1335
C09K 19/34
C07D 471/22

US Classification:

349 96, 546 27, 25229961, 349187

Abstract:

Compounds derived from aromatic tetracarboxyl bisbenzoimidazoles are disclosed. These compounds are capable of forming liquid crystal systems that can produce optically isotropic or anisotropic films with desirable optical properties. Formulae (I) or (II), or a salt thereof; wherein y is an integer in the range from 0 to about 4.

US Patent:

59283343, Jul 27, 1999

Filed:

Mar 28, 1997

Appl. No.:

8/827549

Inventors:

Sriram Mandyam - Austin TX
Brian Walter O'Krafka - Austin TX
Ramanathan Raghavan - Round Rock TX
Robert James Ramirez - New Braunfels TX
Miwako Tokugawa - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1516
G06F 1200

US Classification:

709248

Abstract:

One aspect of the invention relates to a method for detecting synchronization violations in a multiprocessor computer system having a memory location which controls access to a portion of memory shared by the processors, the memory location having at least one lock bit indicating whether the portion of memory is locked by one of the processors and a plurality of bits for storing a data value. The method comprises reading the memory location by an individual processor; testing the lock bit to determine whether the portion of memory is locked; if the portion of memory is not locked; asserting the lock bit to indicate the portion of memory is locked; incrementing the data value to represent a global access count; writing the lock bit and the data value back to the memory location; and incrementing a data value stored in a memory location associated with the individual processor to indicate an individual access count by the individual processor. The individual access counts for each processor are then summed and compared to the global access count to determine whether a synchronization violation has occurred.

US Patent:

60212616, Feb 1, 2000

Filed:

Dec 5, 1996

Appl. No.:

8/760497

Inventors:

Archie Don Barrett - Leander TX
Sriram Srinivasan Mandyam - Austin TX
Brian Walter O'Krafka - Austin TX
Brett Adam St. Onge - Austin TX
Robert James Ramirez - New Braunfels TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1100

US Classification:

39518313

Abstract:

A multiprocessor data processing system includes a shared main memory and a plurality of processors connected to the memory utilizing a system bus. Data is transferred utilizing the system bus. The plurality of processors include a first processor and a second processor. The first processor includes a first cache, and the second processor includes a second cache. The multiprocessor data processing system executes a test program. During execution of the test program, a first and a second trace are generated. The first trace is generated by monitoring all events occurring at a first location within the system. The second trace is generated by monitoring all events occurring at a second location within the system. Each event is associated with a time of occurrence of that event. The first trace includes each event which was monitored at the first location and the time associated with each event.

US Patent:

62859749, Sep 4, 2001

Filed:

May 4, 1999

Appl. No.:

9/304538

Inventors:

Sriram Mandyam - Austin TX
Brian Walter O'Krafka - Austin TX
Ramanathan Raghavan - Round Rock TX
Robert James Ramirez - New Braunfels TX
Miwako Tokugawa - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1750
G06F 762

US Classification:

703 13

Abstract:

One aspect of the invention relates to a method for detecting architectural violations in a multiprocessor computer system. In one version of the invention, the method includes the steps of generating a testcase instruction stream having a plurality of instructions, executable by the processors, which access a memory which is shared by the processors; detecting dependent instructions in the testcase instruction stream; and modifying the testcase instruction stream by inserting logging instructions in the testcase in the testcase instruction stream which cause data associated with observable instructions to be written to a logging memory by writing a first sequence of unique monotonically increasing values to the memory. Thereafter, a second sequence of values is read from the memory location and a window of observed values is defined, wherein the window has a highest observable value and a lowest observable value where the highest observable value is set to the highest value of the first sequence and the lowest observable value is set to the lowest value of the first sequence and wherein the lowest observable value is updated with a next observable value from the first sequence whenever the value of an individual read from the second sequence is higher than the lowest observable value so that a determination can be made whether individual values in the second sequence are within the window.

US Patent:

20220220681, Jul 14, 2022

Filed:

Jan 6, 2022

Appl. No.:

17/570257

Inventors:

- San Clemente CA, US
Felipe Almanza - San Clemente CA, US
Robert Ramirez - San Clemente CA, US

International Classification:

E01F 15/14

Abstract:

A transition system for connecting a crash attenuator to a roadside fixed structure, such as a concrete traffic barrier, includes a plate adapted to securely attach to a desired location on the fixed structure, the plate having a flat surface adapted to correspond to a flat surface on the fixed structure, and being reinforced by a plurality of backing ribs for strength.

US Patent:

20170341532, Nov 30, 2017

Filed:

May 17, 2017

Appl. No.:

15/597864

Inventors:

Stephen J. Sowinski - Rochester Hills MI, US
Robert C. Ramirez - White Lake MI, US
Mark T. Moushegian - San Diego CA, US
Daniel Kaczmarek - Livonia MI, US

International Classification:

B60N 2/07
B60R 22/26
B60R 22/34
B60N 2/30
B60R 22/18

Abstract:

A seat includes a seat bottom, a seat back, a seat mounting structure configured to support the seat bottom and the seat back, the seat mounting structure configured to slidably couple to the rail assembly, and an occupant restraint system including a seat belt coupled to a retractor assembly. The retractor assembly is configured to slidably couple to the rail assembly such that the retractor assembly moves along the rail assembly as the seat mounting structure is moved along the rail assembly, the occupant restraint system configured to transfer load to the rail assembly disposed in the vehicle floor.