Robert L Reissfelder

US Patent:

6732249, May 4, 2004

Filed:

Jun 9, 2000

Appl. No.:

09/590892

Inventors:

Heidi R. Pickreign - Harvard MA
Laxminarayan Krishnamurthy - Acton MA
Robert Reissfelder - Westwood MA

Assignee:

3Com Corporation - Santa Clara CA

International Classification:

G06F 1206

US Classification:

711202, 711170, 713 2

Abstract:

The present application is directed to a method and system for mapping a host computer address space into a network interface adapter (NIA) address space. A network interface processor contained within the NIA requests a memory allocation from the host computer. The host computer responds with an assigned base address in the host computer address space and a length defining the contiguous addresses within the host computer address space equal to the allocation requested by the NIA processor. A hardware trap is set, such that, an interrupt to the NIA processor is generated when the host computer attempts to access data at an address within the allocated address range of host computer contiguous addresses. The network interface processor translates the received host address to a physical address within the NIA address space, reads the data at the respective NIA physical address and transfers the data to the host computer.

US Patent:

6842790, Jan 11, 2005

Filed:

Apr 30, 2004

Appl. No.:

10/836852

Inventors:

Heidi R. Pickreign - Harvard MA, US
Laxminarayan Krishnamurthy - Acton MA, US
Robert Reissfelder - Westwood MA, US

Assignee:

3Com Corporation - Santa Clara CA

International Classification:

G06F 1314

US Classification:

709245, 711202, 710 52, 709212

Abstract:

A system and method of mapping a host computer address space into a network interface adapter (NIA) address space. A network interface processor within the NIA requests a memory allocation from the host computer. The host computer responds with an assigned base address in the host computer address space, and a length defining the contiguous addresses within the host computer address space equal to the allocation requested by the NIA processor. A hardware trap is set such that an interrupt to the NIA processor is generated when the host computer attempts to access data at an address within the allocated address range of host computer contiguous addresses. The network interface processor translates the received host address to a physical address within the NIA address space, reads the data at the respective NIA physical address, and transfers the data to the host computer.