Robert Richard Robertson

US Patent:

6338874, Jan 15, 2002

Filed:

Dec 14, 1995

Appl. No.:

08/572385

Inventors:

Kam S. Law - Union City CA
Robert Robertson - Palo Alto CA
Pamela Lou - San Francisco CA
Marc Michael Kollrack - Alameda CA
Angela Lee - Sunnyvale CA
Dan Maydan - Los Altos Hills CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

C23C 1600

US Classification:

42725518, 42725519, 42725527, 42725537, 427255394

Abstract:

Multilayer deposition of thin films onto glass substrates to form thin film transistors can be carried out in the same chamber under similar reaction conditions at high deposition rates. We have found that sequential thin layers of silicon nitride and amorphous silicon can be deposited in the same chamber by chemical vapor deposition using pressure of at least 0. 5 Torr and substrate temperatures of about 250-370Â C. Subsequently deposited different thin films can also be deposited in separate chemical vapor deposition chambers which are part of a single multichamber vacuum system.

US Patent:

6352910, Mar 5, 2002

Filed:

Feb 12, 1999

Appl. No.:

09/249041

Inventors:

William R. Harshbarger - San Jose CA
Takako Takehara - Hayward CA
Jeff C. Olsen - Los Gatos CA
Regina Qiu - Cupertino CA
Yvonne LeGrice - Walnut CA
Guofu J. Feng - San Jose CA
Robert M. Robertson - Santa Clara CA
Kam Law - Union City CA

Assignee:

Applied Komatsu Technology, Inc. - Tokyo

International Classification:

H01L 2120

US Classification:

438482, 438485

Abstract:

Deposition methods for preparing amorphous silicon based films with controlled resistivity and low stress are described. Such films can be used as the interlayer in FED manufacturing. They can also be used in other electronic devices which require films with controlled resistivity in the range between those of an insulator and of a conductor. The deposition methods described in the present invention employ the method of chemical vapor deposition or plasma-enhanced chemical vapor deposition; other film deposition techniques, such as physical vapor deposition, also may be used. In one embodiment, an amorphous silicon-based film is formed by introducing into a deposition chamber a silicon-based volatile, a conductivity-increasing volatile including one or more components for increasing the conductivity of the amorphous silicon-based film, and a conductivity-decreasing volatile including one or more components for decreasing the conductivity of the amorphous silicon-based film.

US Patent:

6355108, Mar 12, 2002

Filed:

Jun 22, 1999

Appl. No.:

09/338245

Inventors:

Tae Kyung Won - Santa Clara CA
Quanyuan Shang - Saratoga CA
Robert M. Robertson - Saratoga CA
Soo Young Choi - Mun San Up, KR
Kam S. Law - Union City CA
Robert I. Greene - Fremont CA
John M. White - Santa Clara CA

Assignee:

Applied Komatsu Technology, Inc. - Tokyo

International Classification:

C23C 1600

US Classification:

118728, 118723 R, 118500

Abstract:

The present invention relates generally to a clamping and alignment assembly for a substrate processing system. The clamping and aligning assembly generally includes a shadow frame, a floating plasma shield and a plurality of insulating alignment pins. The shadow frame comprises a plurality of tabs extending inwardly therefrom and is shaped to accommodate a substrate. The tabs comprise protruding contact surfaces for stabilizing a substrate on a support member during processing. The insulating alignment pins are disposed at a perimeter of a movable support member and cooperate with an alignment recess formed in the shadow frame to urge the shadow frame into a desired position. Preferably, the floating plasma shield is disposed on the insulating alignment pins in spaced relationship between the support member and the shadow frame to shield the perimeter of the support member during processing.

US Patent:

6444277, Sep 3, 2002

Filed:

Sep 9, 1994

Appl. No.:

08/303566

Inventors:

Kam S. Law - Union City CA
Robert Robertson - Palo Alto CA
Pamela Lou - San Francisco CA
Marc Michael Kollrack - Alameda CA
Angela Lee - Sunnyvale CA
Dan Maydan - Los Altos Hills CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

B05D 306

US Classification:

427574, 427535, 42725518, 42725528, 4272557, 427573

Abstract:

Amorphous silicon thin films can be deposited onto large area glass substrates at high deposition rates by chemical vapor deposition using pressure of at least 0. 8 Torr and temperatures of about 270-350Â C. and fairly high gas flow rates of silane in a hydrogen carrier gas. The spacing between the inlet gas manifold and the substrate in the CVD chamber is maintained so as to maximize the deposition rate. Improved transistor characteristics are observed when the substrate is either exposed to a hydrogen plasma for a few seconds prior to high rate deposition of the amorphous silicon, or when a first layer of amorphous silicon is deposited using a slow deposition rate process prior to deposition of the high deposition rate amorphous silicon.

US Patent:

6468601, Oct 22, 2002

Filed:

Mar 10, 2000

Appl. No.:

09/523538

Inventors:

Quanyuan Shang - San Jose CA
Robert McCormick Robertson - Santa Clara CA
Kam S. Law - Union City CA
Dan Maydan - Los Altos Hills CA

Assignee:

Applied Komatsu Technology, Inc. - Tokyo

International Classification:

B05D 306

US Classification:

427563, 427574, 427578, 438792, 134 11, 1341041

Abstract:

An apparatus and method for reducing the production of white powder in a process chamber used for depositing silicon nitride. Steps of the method include heating at least a portion of a wall of the process chamber; providing a liner covering a substantial portion of a wall of the process chamber; providing a remote chamber connected to the interior of the process chamber; causing a plasma of cleaning gas in the remote chamber; and flowing a portion of the plasma of cleaning gas into the process chamber. The apparatus includes a deposition chamber having walls; means for heating the walls, the means thermally coupled to the walls; a liner covering a substantial portion of the walls; a remote chamber disposed outside of the chamber; an activation source adapted to deliver energy into the remote chamber; a first conduit for flowing a precursor gas from a remote gas supply into the remote chamber where it is activated by the activation source to form a reactive species; and a second conduit for flowing the reactive species from the remote chamber into the deposition chamber.

US Patent:

6500265, Dec 31, 2002

Filed:

Nov 15, 2000

Appl. No.:

09/714023

Inventors:

Quanyuan Shang - San Jose CA
Robert McCormick Robertson - Santa Clara CA
Kam S. Law - Union City CA
James T. Gardner - Fremont CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

C23C 1600

US Classification:

118728, 118723 R, 118723 E, 15634524, 15634554, 219634, 279128, 361234

Abstract:

An apparatus for holding a substrate on a support layer in a processing chamber. The apparatus is directed to a susceptor system for a processing chamber in which a substrate is electrostatically held essentially flat. The apparatus includes a substrate support and a support layer composed of a dielectric material disposed on the substrate support. At least one lift pin is used for supporting the substrate relative to the support layer. A device is provided for moving each lift pin relative to the support layer. A device is also provided for producing a plasma within the processing chamber.

US Patent:

6610374, Aug 26, 2003

Filed:

Sep 10, 2001

Appl. No.:

09/954797

Inventors:

Takako Takehara - Hayward CA
Regina Qiu - Cupertino CA
Yvonne LeGrice - Mountain View CA
William Reid Harshbarger - San Jose CA
Robert McCormick Robertson - Santa Clara CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

B05D 306

US Classification:

427554, 427109, 427167, 42725518, 427314, 427379, 4273762

Abstract:

A thin film layer can be formed on a glass substrate by preheating the substrate, depositing an amorphous silicon precursor layer on the substrate at a first temperature, and annealing the substrate in a thermal processing chamber at a second temperature sufficiently higher than the first temperature to substantially reduce the hydrogen concentration in the precursor layer. The preheating and annealing steps can occur in the same thermal processing chamber. Then the precursor layer is converted to a polycrystaline silicon layer by laser annealing.

US Patent:

6902682, Jun 7, 2005

Filed:

Nov 18, 2002

Appl. No.:

10/299876

Inventors:

Quanyuan Shang - San Jose CA, US
Robert McCormick Robertson - Santa Clara CA, US
Kam S. Law - Union City CA, US
James T. Gardner - Fremont CA, US

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H02N013/00
C23C016/00

US Classification:

216 67, 118728, 15634554

Abstract:

An apparatus and method for holding a substrate on a support layer in a processing chamber. The method includes the steps of positioning the substrate a predetermined distance from the support layer, introducing a plasma in the processing chamber, lowering the substrate to a point where the substrate engages the support layer, and maintaining the plasma for a predetermined time. The apparatus is directed to a susceptor system for a processing chamber in which a substrate is electrostatically held essentially flat. The apparatus includes a substrate support and a support layer composed of a dielectric material disposed on the substrate support. At least one lift pin is used for supporting the substrate relative to the support layer. Means are provided for moving each lift pin relative to the support layer. Means are also provided for producing a plasma within the processing chamber.