Robert B Sharp

US Patent:

6516352, Feb 4, 2003

Filed:

Aug 17, 1998

Appl. No.:

09/135074

Inventors:

Bradley J. Booth - Austin TX
Robert O. Sharp - Round Rock TX
William Kass - Austin TX

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1516

US Classification:

709250, 370463

Abstract:

A system and method for dynamically switching between different physical layer devices (PHYs) in a network interface. The system comprises a network interface in a network device, e. g. , a network card in a computer system which includes a first PHY device and a second PHY device. The first PHY device is coupled to a first transmission medium (such as fiber-optic cable) which requires a continuous connection to the computer system when active. For a SERDES device, this continuous connection is required because the PHY needs constant access to its physical coding sublayer (PCS), which is located external to the PHY. The second PHY device is coupled to a second transmission medium (such as copper cable) which does not require this continuous connection. This second PHY may be, for example, a G/MII device, which includes the PCS internally. The network interface card further includes a link switching unit, a physical layer interface unit, and a control unit.

US Patent:

7849232, Dec 7, 2010

Filed:

Feb 17, 2006

Appl. No.:

11/356501

Inventors:

Robert O. Sharp - Round Rock TX, US
Kenneth G. Keels - Georgetown TX, US
Brian S. Hausauer - Austin TX, US
John S. Lacombe - Austin TX, US

Assignee:

Intel-NE, Inc. - Wilmington DE

International Classification:

G06F 3/00
G06F 15/167
G06F 15/173
G06F 9/455

US Classification:

710 8, 709212, 709223, 709226, 718 1, 718100

Abstract:

A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

US Patent:

8032664, Oct 4, 2011

Filed:

Sep 2, 2010

Appl. No.:

12/874739

Inventors:

Robert O. Sharp - Round Rock TX, US
Kenneth G. Keels - Georgetown TX, US
Brian S. Hausauer - Austin TX, US
John S. Lacombe - Austin TX, US

Assignee:

Intel-Ne, Inc. - Wilmington DE

International Classification:

G06F 3/00
G06F 15/167
G06F 15/173
G06F 9/455

US Classification:

710 8, 709212, 709223, 709226, 718 1, 718100

Abstract:

A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

US Patent:

8078743, Dec 13, 2011

Filed:

Feb 17, 2006

Appl. No.:

11/356493

Inventors:

Robert O. Sharp - Round Rock TX, US
Kenneth G. Keels - Georgetown TX, US
Brian S. Hausauer - Austin TX, US
Eric Rose - Cedar Park TX, US

Assignee:

Intel-NE, Inc. - Wilmington DE

International Classification:

G06F 15/16

US Classification:

709230, 709223, 709250, 709233, 370412, 370419

Abstract:

A computer system such as a server pipelines RNIC interface (RI) management/control operations such as memory registration operations to hide from network applications the latency in performing RDMA work requests caused in part by delays in processing the memory registration operations and the time required to execute the registration operations themselves. A separate QP-like structure, called a control QP (CQP), interfaces with a control processor (CP) to form a control path pipeline, separate from the transaction pipeline, which is designated to handle all control path traffic associated with the processing of RI control operations. This includes memory registration operations (MR OPs), as well as the creation and destruction of traditional QPs for processing RDMA transactions. Once the MR OP has been queued in the control path pipeline of the adapter, a pending bit is set which is associated with the MR OP. Processing of an RDMA work request in the transaction pipeline that has engendered the enqueued MR OP is permitted to proceed as if the processing of the MR OP has already been completed.

US Patent:

8271694, Sep 18, 2012

Filed:

Aug 26, 2011

Appl. No.:

13/219145

Inventors:

Robert O. Sharp - Round Rock TX, US
Kenneth G. Keels - Georgetown TX, US
Brian S. Hausauer - Austin TX, US
John S. Lacombe - Austin TX, US

Assignee:

Intel-Ne, Inc. - Wilmington DE

International Classification:

G06F 3/00
G06F 15/167
G06F 15/173
G06F 9/455

US Classification:

710 8, 709212, 709223, 709226, 718 1, 718100

Abstract:

A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

US Patent:

8391464, Mar 5, 2013

Filed:

Jun 24, 2010

Appl. No.:

12/803314

Inventors:

Robert Douglas Sharp - Palo Alto CA, US

Assignee:

Nuance Communications, Inc. - Burlington MA

International Classification:

H04M 3/00

US Classification:

37926501, 379 8801

Abstract:

The present invention uses natural language understanding to increase the ability of a customer service system to respond to a user's query in an automated manner. A customer service system receives a query from a user and offers the user the option of having the system contact the user at a later time with an answer. If the user accepts the offer, the customer service system processes the query offline, including providing the query to a natural language understanding interpreter. The system uses the natural language understanding interpretation to determine if the user's query is in a database of frequently-asked queries. For each query in the database of frequently-asked queries, there is a predetermined response protocol. If the user's query substantially matches a query in the database, the IVR system contacts the user with an automated response in accordance with the predetermined response protocol for the query.

US Patent:

8402746, Mar 26, 2013

Filed:

May 3, 2010

Appl. No.:

12/772520

Inventors:

John Powell - Santa Clarita CA, US
Robert Sharp - Camarillo CA, US

International Classification:

F01N 3/00
F23J 15/00

US Classification:

60281, 60282, 60283, 60284, 60285, 440 88 R, 440 89 R, 141279, 141387, 141388

Abstract:

An exhaust gas capture system for capturing the exhaust gas emitted by auxiliary engines, auxiliary boilers, and other sources on an Ocean Going Vessel (OGV) while at berth or at anchor so that these gases may be carried to an emissions treatment system for removal of air pollutants and or greenhouse gases. The exhaust gas capture system includes a manifold and a family of parallel-flow flexible ducts for connecting directly to individual OGV exhaust pipes. The exhaust gas capture system further includes apparatus for connecting the parallel-flow flexible ducts to the OGV exhaust pipes.

US Patent:

8489778, Jul 16, 2013

Filed:

Aug 17, 2012

Appl. No.:

13/588733

Inventors:

Robert O. Sharp - Round Rock TX, US
Kenneth G. Keels - Georgetown TX, US
Brian S. Hausauer - Austin TX, US
John S. Lacombe - Austin TX, US

Assignee:

Intel-NE, Inc. - Wilmington DE

International Classification:

G06F 3/00
G06F 13/12
G06F 15/173

US Classification:

710 8, 710 11, 710 62, 710 64, 709220, 709227, 709229

Abstract:

A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.