Robert F Spivey

US Patent:

20190287782, Sep 19, 2019

Filed:

Mar 19, 2019

Appl. No.:

16/357488

Inventors:

- Durham NC, US
Jungsang KIM - Chapel Hill NC, US
Robert SPIVEY - Durham NC, US
Yuhi AIKYO - Durham NC, US

International Classification:

H01J 49/42
H01J 49/16
G06N 10/00

Abstract:

Systems and methods for loading microfabricated ion traps are disclosed. Photo-ablation via an ablation pulse is used to generate a flow of atoms from a source material, where the flow is predominantly populated with neutral atoms. As the neutral atoms flow toward the ion trap, two-photon photo-ionization is used to selectively ionize a specific isotope contained in the atom flow. The velocity of the liberated atoms, atom-generation rate, and/or heat load of the source material is controlled by controlling the fluence of the ablation pulse to provide high ion-trapping probability while simultaneously mitigating generation of heat in the ion-trapping system that can preclude cryogenic operation. In some embodiments, the source material is held within an ablation oven comprising an electrically conductive housing that is configured to restrict the flow of agglomerated neutral atoms generated during photo-ablation toward the ion trap.

US Patent:

20190057318, Feb 21, 2019

Filed:

Jul 18, 2018

Appl. No.:

16/039186

Inventors:

- Durham NC, US
Geert VRIJSEN - Durham NC, US
Robert SPIVEY - Durham NC, US

International Classification:

G06N 99/00
H03K 3/38
H03H 7/38

Abstract:

Aspects of the present disclosure describe a compact RF driver circuit for Paul traps in trapped ion quantum computers and methods, and structures including same.

US Patent:

20190027355, Jan 24, 2019

Filed:

Mar 26, 2018

Appl. No.:

15/935312

Inventors:

- Durham NC, US
Kai HUDEK - Durham NC, US
Geert VRIJSEN - Durham NC, US
Robert SPIVEY - Durham NC, US
Peter MAUNZ - Durham NC, US

International Classification:

H01J 49/42
H01J 49/16
H01J 49/24
G06N 99/00

Abstract:

A package-level, integrated high-vacuum ion-chip enclosure having improved thermal characteristics is disclosed. Enclosures in accordance with the present invention include first and second chambers that are located on opposite sides of a chip carrier, where the chambers are fluidically coupled via a conduit through the chip carrier. The ion trap is located in the first chamber and disposed on the chip carrier. A source for generating an atomic flux is located in the second chamber. The separation of the source and ion trap in different chambers affords thermal isolation between them, while the conduit between the chambers enables the ion trap to receive the atomic flux.