Robert Alan Swanson

US Patent:

7673128, Mar 2, 2010

Filed:

Apr 22, 2005

Appl. No.:

11/112096

Inventors:

Vincent J. Zimmer - Federal Way WA, US
Michael A. Rothman - Puyallup WA, US
Mallik Bulusu - Olympia WA, US
Greg McGrath - Olympia WA, US
Michael Kinney - Olympia WA, US
Robert C. Swanson - Olympia WA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 15/177
G06F 9/24
G06F 1/24
G06F 11/00

US Classification:

713 2, 713 1, 713100, 714 23, 714 36

Abstract:

Methods and apparatus to facilitate fast restarts in processor systems are disclosed. An example processor restart method disclosed herein includes recording a log of pre-boot initialization actions, and replaying a portion of the log during subsequent processor restarts to shorten pre-boot initialization time. The example processor restart method disclosed herein may further include creating a log index table for easier referral to portions of the log, storing the log and the log index table in non-volatile memory, using the log index table to reorder the replaying of the log, and reordering the replay of the log to initialize the video graphics adapter earlier in a processor restart sequence.

US Patent:

7779244, Aug 17, 2010

Filed:

Dec 28, 2006

Appl. No.:

11/647542

Inventors:

Vincent J. Zimmer - Federal Way WA, US
Michael A. Rothman - Puyallup WA, US
Robert C. Swanson - Olympia WA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 15/177

US Classification:

713 2, 713 1, 712203

Abstract:

In some embodiments, the invention involves a system and method to provide maximal boot-time parallelism for future multi-core, multi-node, and many-core systems. In an embodiment, the security (SEC), pre-EFI initialization (PEI), and then driver execution environment (DXE) phases are executed in parallel on multiple compute nodes (sockets) of a platform. Once the SEC/PEI/DXE phases are executed on all compute nodes having a processor, the boot device select (BDS) phase completes the boot by merging or partitioning the compute nodes based on a platform policy. Partitioned compute nodes each run their own instance of EFI. A common memory map may be generated prior to operating system (OS) launch when compute nodes are to be merged. Other embodiments are described and claimed.

US Patent:

7793090, Sep 7, 2010

Filed:

Aug 30, 2007

Appl. No.:

11/897469

Inventors:

Vincent J. Zimmer - Federal Way WA, US
Mallik Bulusu - Olympia WA, US
Michael A. Rothman - Puyallup WA, US
Robert C. Swanson - Olympia WA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 15/177

US Classification:

713 2, 713 1, 713100, 726 2, 726 4

Abstract:

In one embodiment, the present invention includes a method for executing a first code portion of a pre-boot environment from a first non-volatile memory, authenticating a trusted hypervisor in the first non-volatile memory using the first code portion, executing the trusted hypervisor if the trusted hypervisor is authenticated, and authenticating a basic input/output system (BIOS) present in a second non-volatile memory with the trusted hypervisor and transferring control from the trusted hypervisor to the BIOS if the BIOS is authenticated. Other embodiments are described and claimed.

US Patent:

8391913, Mar 5, 2013

Filed:

Jul 18, 2007

Appl. No.:

11/779803

Inventors:

Vincent J. Zimmer - Federal Way WA, US
Michael A. Rothman - Puyallup WA, US
Palsamy Sakthikumar - Puyallup WA, US
Mallik Bulusu - Olympia WA, US
Robert C. Swanson - Olympia WA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H04B 1/26

US Classification:

4555501, 375316

Abstract:

A software-defined radio (SDR) capability may be provided in a general purpose, many core processing system by sequestering one or more partitions running on one or more cores and instantiating a communications capability by having discrete SDR functions performed by the sequestered partitions. Each SDR module embodied in a sequestered partition may be independently upgraded without modifying the hardware of the underlying processing system. By executing SDR modules in cores not accessible by application programs and/or an operating system (OS), a better Quality of Service (QoS) may be provided for wireless communications on the general purpose, multi-core processing system. An embodiment comprises isolating a core of a many core processing system as a sequestered partition, loading a software-defined radio module onto the core, and executing the software-defined module to implement wireless communications.

US Patent:

8479017, Jul 2, 2013

Filed:

Jun 21, 2010

Appl. No.:

12/819933

Inventors:

Vincent J. Zimmer - Federal Way WA, US
Michael A. Rothman - Puyallup WA, US
Robert C. Swanson - Olympia WA, US
Palsamy Sakthikumar - Puyallup WA, US
Mallik Bulusu - Olympia WA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 21/00

US Classification:

713189, 713178, 713192, 713194

Abstract:

Enhancing locality in a security co-processor module of a computing system may be achieved by including one or more additional attributes such as geographic location, trusted time, a hardware vendor string, and one or more environmental factors into an access control space for machine mode measurement of a computing system.

US Patent:

20060136713, Jun 22, 2006

Filed:

Dec 22, 2004

Appl. No.:

11/023273

Inventors:

Vincent Zimmer - Federal Way WA, US
Michael Rothman - Puyallup WA, US
Robert Swanson - Olympia WA, US

International Classification:

H04L 9/00

US Classification:

713150000

Abstract:

A system and method are described for performing security operations for a cluster of servers. In one embodiment, a global secret is generated which is used to perform security operations for the cluster of servers. A plurality, n, shadows are generated based on the global secret. A subset of the plurality of shadows, m, may be used to recreate the global secret. The plurality of shadows are then distributed and stored across the plurality of servers.

US Patent:

20070234077, Oct 4, 2007

Filed:

Mar 31, 2006

Appl. No.:

11/395670

Inventors:

Michael Rothman - Sammamish WA, US
Vincent Zimmer - Federal Way WA, US
Robert Swanson - Olympia WA, US
Mallik Bulusu - Olympia WA, US

International Classification:

G06F 1/00

US Classification:

713300000

Abstract:

Power consumption may be reduced by imbalancing the loads handled by interchangeable components. Interchangeable components, such as memory devices, processors, servers, or other entities, may be imbalanced to reduce power consumption as circumstances allow. As a result, interchangeable components that are used to implement effectively the same function may be powered down or hot-removed and their duties transferred to other components. As a result, the deactivated component may be powered down to a reduced power consumption state, thereby reducing the overall power consumption of the system.

US Patent:

20130340081, Dec 19, 2013

Filed:

Mar 30, 2012

Appl. No.:

13/992009

Inventors:

Palsamy Sakthikumar - Puyallap WA, US
Vincent Zimmer - Federal Way WA, US
Robert C. Swanson - Olympia WA, US

International Classification:

G06F 21/56

US Classification:

726 24

Abstract:

An apparatus includes a memory that is accessible by an operating system; and a basic input/output system (BIOS) handler. The BIOS handler, in response to detected malicious software activity, stores data in the memory to report the activity to the operating system.