Robert L Swenson

US Patent:

51931621, Mar 9, 1993

Filed:

Nov 6, 1989

Appl. No.:

7/432421

Inventors:

Donald T. Bordsen - St. Paul MN
Thomas P. Cooper - New Brighton MN
Robert F. Esson - Vadnais Heights MN
Michael J. Hill - Vadnais Heights MN
John R. Jordan - St. Paul MN
Joseph E. Kessler - St. Anthony MN
Dennis R. Konrad - Welch MN
Ralph E. Sipple - Shoreview MN
Robert E. Swenson - Mendota Heights MN
James F. Torgerson - Anoka MN
Anthony P. vonArx - New Brighton MN

Assignee:

Unisys Corporation - Blue Bell PA

International Classification:

G06F 1300

US Classification:

395425

Abstract:

A multiprocessor data processing system is implemented with processors, each of which may request for a temporary time the exclusive lock on an object which is stored on a data base. To achieve this a lock processor synchronizes the locking and unlocking of the objects. The requesting processor directs the storage of the object from the data base into a selected high performance storage unit, where it has exclusive rights to modify or write into the object until the object is unlocked by the processor. An audit tape or disk records all modifications made to any object during a transaction. A non-volatile cache memory is inserted in the audit trail to store a before-look image of the object that resides in the high performance storage unit. Data compaction occurs by comparison of the before-look image with an after-look image to provide a difference image, which is supplied to an audit buffer that is coupled to the audit tape. The locking processor may unlock the secured object once the after-look image has been committed from either a stored version in the non-volatile cache or from a high performance main memory unit to the data base disk.

US Patent:

44333749, Feb 21, 1984

Filed:

Nov 14, 1980

Appl. No.:

6/207091

Inventors:

Merlin L. Hanson - Arden Hills MN
Robert E. Swenson - Mendota Heights MN
Arnold R. Schmalzbauer - Minneapolis MN

Assignee:

Sperry Corporation - New York NY

International Classification:

G06F 702

US Classification:

364200

Abstract:

In a data processing system having a host processor, a cache store for storing segments of data, a bulk memory and a storage control unit for controlling transfers between the processor, cache store and bulk memory, the storage control unit normally responds to a read or write command from the host processor to control the transfer of data. If a copy of the data transferred is not resident in the cache store then a copy is written therein by the storage control unit. If the length of a data transfer exceeds a first threshold length then the storage control unit does not write a copy of the data into the cache store. If the length of a data transfer exceeds a second threshold length, and the transfer begins on a segment boundary and comprises an integral number of segments, then the storage control unit does not write a copy of the data into the cache store. The writing into the cache store is transparent to the host processor. The use of a transfer threshold prevents data from being entered into the cache store when it is not likely to be used again soon.

US Patent:

55443435, Aug 6, 1996

Filed:

Dec 23, 1993

Appl. No.:

8/172651

Inventors:

Robert E. Swenson - Mendota Heights MN
Joseph E. Kessler - St. Anthony MN

Assignee:

Unisys Corporation - Blue Bell PA

International Classification:

G06F 1202

US Classification:

395460

Abstract:

An outboard file cache system including file surge protection and an improved method for managing allocation of cache storage are disclosed. In an outboard cache, excessive writes to a file are detected by testing whether a segment belonging to a file specified by a nd, which logically precedes one of the segments specified in the command by a predetermined number of segments, is present in the outboard file cache, has been written, and has not been destaged. When a first surge-threshold is reached, a group of segments is selected and destaged. When a second surge-threshold is reached, the outboard cache inhibits allocation of further cache storage for the file for the purpose of writing until a selected group of segments is destaged.

US Patent:

55265111, Jun 11, 1996

Filed:

Dec 23, 1993

Appl. No.:

8/173443

Inventors:

Robert E. Swenson - Mendota Heights MN
Kevin W. Bengtson - Shoreview MN

Assignee:

Unisys Corporation - Blue Bell PA

International Classification:

G06F 1212

US Classification:

395461

Abstract:

The disclosure relates to a cache management method for a post-store cache. Recently referenced units of storage in the cache are identified and a round robin cache replacement method is generally used to select a unit of storage for replacement if the unit of storage has not been recently referenced. Recently used segments are identified by maintaining a Recently Used Zone ahead of the storage location presently considered for replacement. For each reference to a unit of storage in the cache which results in a miss, a portion of the cache is scanned for units of storage to destage.

US Patent:

44133170, Nov 1, 1983

Filed:

Nov 14, 1980

Appl. No.:

6/207092

Inventors:

Robert E. Swenson - Mendota Heights MN

Assignee:

Sperry Corporation - New York NY

International Classification:

G06F 1300
G06F 1304
G06F 1516

US Classification:

364200

Abstract:

In a data processing system having plural disk devices connected to first and second storage control units, and plural processors connected to the storage control units by connection paths, a table is provided having entries defining the connection paths between each storage control unit and each processor. The storage control units may queue commands from the processors in a command queue for later execution. Either storage control unit may utilize a queued command to issue a seek signal to a disk device and report status to the processor which issued the command. When a disk device completes a seek it issues an interrupt signal which may be sampled by either storage control unit to report further status. In order to report status to the processor which issued the command, a storage control unit searches the table defining the connection paths between the storage control units and the processors and applies the status to the first available connection path that it finds. If one storage control unit, upon searching the table, finds that there is no connection path between itself and the processor which issued the command, it returns to an idle condition so that the other storage control unit may respond to the interrupt signal, search the table, and apply the status indication to the host processor which issued the command.

US Patent:

58095276, Sep 15, 1998

Filed:

Dec 23, 1993

Appl. No.:

8/174750

Inventors:

Thomas P. Cooper - New Brighton MN
Robert E. Swenson - Mendota Heights MN

Assignee:

Unisys Corporation - Blue Bell PA

International Classification:

G06F 1202

US Classification:

711133

Abstract:

A system and method are described for caching files of data in a cache which is beyond the input/output boundary of a host. A host references a file with file access commands containing a logical file-identifier and a logical offset into the file. An outboard file cache coupled to the input/output section of the host receives the file access commands. The outboard file cache is transparent to users who program the host. Generation of input/output channel programs and mapping the data referenced to a physical address in secondary storage are eliminated when the referenced data is present in the cache. A file descriptor table in the outboard file cache identifies the logical portions of the logical files which are present in the cache. If the data referenced by the logical file-identifier and logical offset in a file access command is present in the outboard file cache, the data is transferred from the outboard file cache to the host memory. Otherwise, a miss status is returned to the host, and the host stages data from secondary storage to the outboard file cache.

US Patent:

55198465, May 21, 1996

Filed:

Dec 23, 1993

Appl. No.:

8/172529

Inventors:

Robert E. Swenson - Mendota Heights MN

Assignee:

Unisys Corporation - Blue Bell PA

International Classification:

G06F 1208

US Classification:

395457

Abstract:

A cache management method in a cache system having a plurality of processors for managing the cache storage. Each of the processors may reserve portions of the cache storage which future allocation of cache storage may be expedited. All the processors begin searching for a portion of cache storage to allocate with the same starting portion of cache storage when processing cache commands in which the referenced data is not present in the cache storage. A processor will advance past the starting portion of cache storage when allocation of a portion of cache storage is necessary and another processor is currently using the starting portion of cache storage.

US Patent:

43947328, Jul 19, 1983

Filed:

Nov 14, 1980

Appl. No.:

6/207097

Inventors:

Robert E. Swenson - Mendota Heights MN

Assignee:

Sperry Corporation - New York NY

International Classification:

G06F 1300

US Classification:

364200

Abstract:

A cache/disk subsystem includes a storage control unit, a relatively low capacity high speed cache store, and a higher capacity slower memory such as a plurality of disk drive devices. The storage control unit controls the subsystem to transfer from the cache store to the disk drive devices segments of data which have been modified while resident in the cache store and insures that space will be available in the cache store for new data if a particular operation requires that new data be transferred from a disk to the cache store for use. The subsystem may include plural storage control units and any of them may control the transfers of segments of data to the disks.