US Air Force - Colorado Springs, Colorado Area since Jul 2011
IT Specialist
AFOTEC - Albuquerque, New Mexico Area Nov 2004 - May 2011
SharePoint 2007 Administrator / Developer
AFMA Feb 1999 - Oct 2004
Software Developer
USAF (552 Computer Support Squadron ) May 1995 - Feb 1999
Softare Test Analyst
Education:
Community College of the US Air Force
AAS, Computer Science Technology
Skills:
C# Dod It Management Information Assurance Microsoft Certified Professional Microsoft Office Sharepoint Server Sdlc Security Security Clearance Sharepoint T Sql Testing Visual Basic Windows Server Windows 7 Troubleshooting System Administration Software Installation Requirements Analysis Programming Microsoft Sql Server Mcitp Javascript Iis Computer Security Enterprise Software Access .Net Active Directory Comptia Leadership Program Management Sharepoint Server .Net Framework Microsoft Access Microsoft Products
Harold S. Crafts - Colorado Springs CO Robert D. Waldron - Fort Collins CO
Assignee:
NCR Corporation - Dayton OH
International Classification:
H03K 513 H03K 3017
US Classification:
307603
Abstract:
A voltage variable delay circuit that provides a relatively constant delay independent of operating voltages, temperatures or processing variations is disclosed. The circuit is particularly suited for delay line or oscillator applications. The relatively constant delay is accomplished by accurately controlling the switching speed of each of the complementary series arranged inverter elements used for the delay line or oscillator. The accurate control is provided by first and second high impedance inverters connected to the gate electrode of series arranged inverters. In the delay line application, two similarly fabricated series arranged inverter elements are placed in parallel. One of the series arranged inverters is used as an operating circuit and the other is used as a reference circuit. A clock signal is used to synchronize the reference circuit with a timing network, and a comparator is used to measure the time difference between the reference circuit and the timing network. The output of the comparator is integrated and used to produce an analog-type control voltage which varies the time delay of both the operating and reference circuits until the reference circuit time delay is equal to that determined by the timing network.