Roderick J Fletcher

US Patent:

46673377, May 19, 1987

Filed:

Aug 28, 1985

Appl. No.:

6/770131

Inventors:

Roderick J. Fletcher - Glen Burnie MD

Assignee:

Westinghouse Electric Corp. - Pittsburgh PA

International Classification:

H03K 19003
H03K 1921

US Classification:

377 41

Abstract:

A logic arrangement for low power integrated circuits which reduces the number of state changes at the synchronously clocked parallel outputs of the integrated circuit. Logic is included which determines the number of output lines which would normally change state when the next output word is clocked onto the output lines. Additional logic determines whether this number is greater than or equal to a predetermined number, being one-half the number of output lines for even numbers of output lines. When the number of state changes will exceed this number, the output word is complemented before being clocked onto the output lines. An extra output line is used to signal the circuitry connected to the output lines that the output states have been complemented. When the number of state changes equals the predetermined number, the output word is complemented only if the previous output word was complemented.