Ronald Lee Nicholson

US Patent:

47776218, Oct 11, 1988

Filed:

Jul 19, 1985

Appl. No.:

6/756910

Inventors:

Jay G. Miner - Mountain View CA
Joseph C. Decuir - Albany CA
Ronald H. Nicholson - Sunnyvale CA

Assignee:

Commodore-Amiga, Inc. - Los Gatos CA

International Classification:

G06F 900

US Classification:

364900

Abstract:

A video game home computer is implemented in NMOS (n type metal oxide semiconductor) technology with plural microprocessors. Centralized bus architecture and direct memory access (DMA) techniques are employed. A video display generator provides color signal outputs to drive a commercial television receiver display. This display generator receives inputs from both microprocessors and obtains data directly from memory. A bit map of display information is kept in memory, wherein bits of information in memory image the precise screen display for each instance in time. A bit map manipulator circuit performs, under microprocessor direction, logic function manipulation of the bit map data. Access between system components is accomplished via the bus architecture on a priority queue basis. Chip count and chip area is minimized.

US Patent:

55944736, Jan 14, 1997

Filed:

Mar 8, 1993

Appl. No.:

8/029306

Inventors:

Jay G. Miner - Mountain View CA
Dave Dean - Ukiah CA
Joseph C. Decuir - Albany CA
Ronald H. Nicholson - Sunnyvale CA
Akio Tanaka - Burlingame CA

Assignee:

Escom AG

International Classification:

G09G 506

US Classification:

345199

Abstract:

A computer that provides data to a video display using a bitmap display memory organization and bitplane addressing. Separate control is provided for two bitplane backgrounds and for eight reusable and easily movable sprites. Additional logic allows for dynamically-controllable interobject priority and collision detection among data in each of the bitplane backgrounds and sprites. A coprocessor provides for video beam-synchronized changes to data in registers, freeing the main processor for general purpose computing tasks. A block image transferer is provided to rapidly copy data in large blocks from one memory location to another. In hold-and-modify mode, color output circuitry holds the values for a previously displayed pixel while bitplane data modifies those values, allowing for simultaneous display of a greatly increased number of colors.