Ronald B Rose

US Patent:

6567773, May 20, 2003

Filed:

Nov 17, 1999

Appl. No.:

09/441797

Inventors:

Khalid Rahmat - Yorktown NY
Ronald D. Rose - Essex Junction VT

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1750

US Classification:

703 14, 326 27, 326 83

Abstract:

A method and structure for analyzing the effect of electrical noise in an integrated circuit fabricated in a silicon-on-insulator (âSOIâ) technology. The present invention uses a static noise analysis to evaluate an integrated circuits response to electrical noise, taking into account hysteresis effect and parasitic bipolar current voltage, both of which are unique to integrated circuits fabricated in a SOI technology process. The present invention also includes a computer, computer storage device, computer program and software incorporating the method steps and simulating the testing and analysis of the circuit under test.

US Patent:

20190347379, Nov 14, 2019

Filed:

Jul 22, 2019

Appl. No.:

16/517990

Inventors:

- Armonk NY, US
Mark A. Lavin - Katonah NY, US
Ronald D. Rose - Essex Junction VT, US
Richard W. Taggart - Poughkeepsie NY, US
Vladimir Zolotov - Putnam Valley NY, US

International Classification:

G06F 17/50

Abstract:

A computer-implemented method includes identifying a noise cluster, representing the noise cluster according to a variational model, projecting the variational model onto one or more corners to yield a projected noise cluster, and determining a computed noise for the projected noise cluster. Optionally, the noise cluster includes one or more noise cluster elements, and each of the noise cluster elements are expressed as one or more circuit element terms, according to a canonical form. Optionally, at least one of the corners is a bounding corner. For the bounding corner, the projected noise cluster is generated by maximizing the circuit element terms for those noise cluster elements that tend to increase noise, and by minimizing the circuit element terms for those noise cluster elements that tend to decrease noise, whereby noise is maximized for the canonical form. A corresponding computer program product and computer system are also disclosed.

US Patent:

20170140090, May 18, 2017

Filed:

Nov 18, 2015

Appl. No.:

14/944552

Inventors:

- Armonk NY, US
Mark A. Lavin - Katonah NY, US
Ronald D. Rose - Essex Junction VT, US
Richard W. Taggart - Poughkeepsie NY, US
Vladimir Zolotov - Putnam Valley NY, US

International Classification:

G06F 17/50

Abstract:

A computer-implemented method includes identifying a noise cluster, representing the noise cluster according to a variational model, projecting the variational model onto one or more corners to yield a projected noise cluster, and determining a computed noise for the projected noise cluster. Optionally, the noise cluster includes one or more noise cluster elements, and each of the noise cluster elements are expressed as one or more circuit element terms, according to a canonical form. Optionally, at least one of the corners is a bounding corner. For the bounding corner, the projected noise cluster is generated by maximizing the circuit element terms for those noise cluster elements that tend to increase noise, and by minimizing the circuit element terms for those noise cluster elements that tend to decrease noise, whereby noise is maximized for the canonical form. A corresponding computer program product and computer system are also disclosed.

Address:

333 Long Dr, Pittsburgh, PA 15241

VIN:

1FAHP3FN9BW111025

Make:

FORD

Model:

FOCUS

Year:

2011