Ronald David Thomas

US Patent:

41908988, Feb 26, 1980

Filed:

Mar 20, 1978

Appl. No.:

5/890545

Inventors:

David L. Farnsworth - Ft. Collins CO
Ronald E. Thomas - Phoenix AZ

Assignee:

Sperry Corporation - New York NY

International Classification:

G06F 305
G06F 504
H03K 302

US Classification:

364900

Abstract:

Input/output (I/O) apparatus for a system is disclosed utilizing a digital processor for entering analog, digital and discrete data into the processor and receiving analog, digital and discrete data from the processor via an I/O data bus. A plurality of analog data signals are applied sequentially to an analog to digital converter via an analog input multiplexer. The resultant digital data are applied in bit parallel fashion to predetermined bits of the I/O data bus reserved for the input and output of analog data. Digital and discrete data is entered with the analog data by shifting the data from each of the digital and discrete data sources in bit parallel fashion into associated shift registers. The contents of the registers are shifted serially into respective predetermined bits of the data bus reserved for the input and output of the digital or discrete data. The contents of the plurality of shift registers for the digital or discrete data are shifted into the respective bits of the data bus in serial fashion while the sequence of parallel digital data from the analog inputs are entered in paralell into the data bus.

US Patent:

63006790, Oct 9, 2001

Filed:

Jun 1, 1998

Appl. No.:

9/087674

Inventors:

Prosanto K. Mukerji - Phoenix AZ
Ronald E. Thomas - Tempe AZ
George W. Hawkins - Gilbert AZ
Rajesh Srinivasan - Scottsdale AZ
Colin B. Bosch - Phoenix AZ
James H. Knapp - Chandler AZ
Laura J. Norton - Apache Junction AZ
Michael J. Seddon - Gilbert AZ

Assignee:

Semiconductor Components Industries, LLC - Phoenix AZ

International Classification:

H01L 2350
H01L 2302
H01L 2348
H05K 118

US Classification:

257738

Abstract:

A semiconductor component includes a semiconductor chip (341, 502, 601, 701, 1101, 1410, 1501) having first and second surfaces opposite each other, a semiconductor device (301) in the semiconductor chip (341, 502, 601, 701, 1101, 1410, 1501), and a flexible substrate (120, 401, 510, 610, 710, 1000, 1050, 1300, 1401, 1510, 1520) packaging the semiconductor chip (341, 502, 601, 701, 1101, 1410, 1501).

US Patent:

60935839, Jul 25, 2000

Filed:

Jun 1, 1998

Appl. No.:

9/087990

Inventors:

Prosanto K. Mukerji - Phoenix AZ
Rajesh Srinivasan - Scottsdale AZ
Ronald E. Thomas - Tempe AZ
Colin B. Bosch - Phoenix AZ
Peter J. Gillespie - Chagrin Falls OH

Assignee:

Semiconductor Components Industries, LLC - Phoenix AZ

International Classification:

H01L 2144
H01L 2148
H01L 2150

US Classification:

438113

Abstract:

A method of manufacturing a semiconductor component includes applying an encapsulant (211) to a wafer (210, 430), degassing the encapsulant (211), and separating the wafer (210, 430) into a plurality of semiconductor components. Manufactured in this manner, the encapsulant (211) of the semiconductor component is substantially devoid of air bubbles and voids.

US Patent:

51191717, Jun 2, 1992

Filed:

Mar 22, 1991

Appl. No.:

7/674291

Inventors:

Israel A. Lesk - Phoenix AZ
Ronald E. Thomas - Tempe AZ
George W. Hawkins - Mesa AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H01L 2348

US Classification:

357 70

Abstract:

An improved semiconductor die for plastic encapsulated semiconductor device packages which impedes the inherent delamination caused by the differing expansion coefficients of the semiconductor die and plastic encapsulation. Rounded or tapered die corners and die edges decrease the stress from the plastic encapsulation that acts upon the semiconductor die. This reduced stress slows the delamination progression and leaves the operational circuitry unaffected for an increased period of time thereby increasing device lifetime.

US Patent:

49281623, May 22, 1990

Filed:

Feb 22, 1988

Appl. No.:

7/158486

Inventors:

Israel A. Lesk - Phoenix AZ
Ronald E. Thomas - Tempe AZ
George W. Hawkins - Mesa AZ
James M. Rugg - Tempe AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H01L 2328

US Classification:

357 72

Abstract:

An improved semiconductor die for plastic encapsulated semiconductor devices which impedes the inherent delamination caused by the differing expansion coefficients of the semiconductor die and plastic encapsulation. Topological configurations are processed in the die corners of the semiconductor die which are void of circuitry. The topological configurations act as barriers and slow the delamination progression. This leaves the operational circuitry unaffected for an increased time thereby increasing device lifetime.

US Patent:

49242911, May 8, 1990

Filed:

Oct 24, 1988

Appl. No.:

7/261439

Inventors:

Israel A. Lesk - Phoenix AZ
George W. Hawkins - Mesa AZ
Ronald E. Thomas - Tempe AZ
William L. Hunter - Scottsdale AZ
James J. Casto - Austin TX
Michael B. McShane - Austin TX

Assignee:

Motorola Inc. - Schaumburg IL

International Classification:

H01L 2348

US Classification:

357 70

Abstract:

A molded semiconductor package having a flagless leadframe wherein a semiconductor die is disposed in or above a die opening of a leadframe. This allows for thin, symmetrical packages and packages having a minimum number of material interfaces to be manufactured because no leadframe flags and minimal die bond material are employed. The present invention further includes guard rings to protect high stress areas of the semiconductor die from damage and heat spreaders to more effectively spread heat dissipated by the semiconductor die.

US Patent:

48329967, May 23, 1989

Filed:

Feb 24, 1988

Appl. No.:

7/159975

Inventors:

Israel A. Lesk - Phoenix AZ
Ronald E. Thomas - Tempe AZ
George W. Hawkins - Mesa AZ

Assignee:

Motorola, Inc. - Schaumberg IL

International Classification:

B32B 104

US Classification:

428 76

Abstract:

A semiconductor die for plastic encapsulation having an adhesion promoter selectively disposed on an outer surface enabling better adhesion between the semiconductor die and a plastic encapsulation. The improved adhesion allows for less relative motion between the semiconductor die and the plastic encapsulation. The reduction of relative motion significantly decreases the delamination progression throughout the semiconductor device and allows for an increased semiconductor device lifetime.

US Patent:

40939030, Jun 6, 1978

Filed:

Jan 31, 1977

Appl. No.:

5/764327

Inventors:

Ronald E. Thomas - Phoenix AZ

Assignee:

Sperry Rand Corporation - New York NY

International Classification:

B64C 1318

US Classification:

318584

Abstract:

The linear signal output range of a rotary transformer type device, such as a sine/cosine synchro, is considerably extended beyond its normal 45. degree. linear range by electronic circuit means. Specifically, the electronic circuit means utilizes the sine signal, which is generally linear from 0. degree. to 45. degree. , as a portion of the output signal and utilizes a resultant signal computed from the cosine signal, which is linear from 45. degree. to approximately 135. degree. for the remaining portion of the output signal.