Roy W Chapel

US Patent:

49073419, Mar 13, 1990

Filed:

Dec 31, 1987

Appl. No.:

7/140294

Inventors:

Roy W. Chapel - Edmonds WA
David N. Duperon - Lake Stevens WA

Assignee:

John Fluke Mfg. Co., Inc. - Everett WA

International Classification:

H01C 702
H01C 704

US Classification:

29612

Abstract:

This invention relates to a proces of manufacturing and adjusting a compound resistor. The compound resistor is formed of a resistive material forming a predominant portion of the resistance and having a small negative temperature coefficient of resistance coupled with an adjustment material having an extremely low resistance and a very high positive temperature coefficient of resistance. After forming the resistive and adjustment portions, a portion of the adjustment material is removed to adjust the composite TCR of the compound resistor substantially to zero without significantly affecting resistance.

US Patent:

42570611, Mar 17, 1981

Filed:

Oct 17, 1977

Appl. No.:

5/842972

Inventors:

Roy W. Chapel - Edmonds WA
I. Macit Gurol - Seattle WA

Assignee:

John Fluke Mfg. Co., Inc. - Mountlake Terrace WA

International Classification:

H01L 2348

US Classification:

357 69

Abstract:

A process for producing thermally isolated monolithic semiconductor die and die produced by the process, plus improved apparatus using the die are disclosed. The process generally comprises the steps of: forming a desired semiconductor component or circuit in a semiconductor wafer (preferably a silicon wafer of crystal orientation) having a protective layer (SiO. sub. 2) on one surface; forming platinum silicide contact windows in said protective layer where external connections to the semiconductor component or circuit is necessary; forming support leads of a layer of adhesive material (which also may have resistive properties, such as Nichrome) and a layer of a structurally strong metal of high electrical conductivity and low thermal conductivity (preferably 304 stainless steel) along predetermined paths extending outwardly toward the edge of the die from said contact windows; simultaneously with the forming of the adhesive layer of said support leads, forming one or more thin film resistors in predetermined regions of said die atop said SiO. sub. 2 protective layer, if desired; removing said SiO. sub. 2 protective layer from a region defined by said support leads, an island or islands in which said semiconductor component or circuit and said resistors are formed and a surrounding frame; and, removing said silicon from the region between said island or islands and said frame.

US Patent:

43462910, Aug 24, 1982

Filed:

Sep 2, 1980

Appl. No.:

6/182966

Inventors:

Roy W. Chapel - Edmonds WA
I. Macit Gurol - Seattle WA

Assignee:

John Fluke Mfg. Co., Inc. - Everett WA

International Classification:

G06G 720

US Classification:

250211R

Abstract:

A process for producing thermally isolated semiconductor die and die produced by the process, plus improved apparatus using the die are disclosed. The process generally comprises the steps of: forming a desired semiconductor component or circuit in a semiconductor wafer (preferably a silicon wafer of crystal orientation) having a protective layer (SiO. sub. 2) on one surface; forming platinum silicide contact windows in said protective layer where external connections to the semiconductor component or circuit is necessary; forming support leads of a layer of adhesive material (which also may have resistive properties, such as Nichrome) and a layer of a structurally strong metal of high electrical conductivity and low thermal conductivity (preferably 304 stainless steel) along predetermined paths extending outwardly toward the edge of the die from said contact windows; simultaneously with the forming of the adhesive layer of said support leads, forming one or more thin film resistors in predetermined regions of said die atop said SiO. sub. 2 protective layer, if desired; removing said SiO. sub. 2 protective layer from a region defined by said support leads, an island or islands in which said semiconductor component or circuit and said resistors are formed and a surrounding frame; and, removing said silicon from the region between said island or islands and said frame.

US Patent:

48034576, Feb 7, 1989

Filed:

Feb 27, 1987

Appl. No.:

7/019669

Inventors:

Roy W. Chapel - Edmonds WA
David N. Duperon - Lake Stevens WA
Joseph E. Meadows - Redmond WA

International Classification:

H01C 1000

US Classification:

338195

Abstract:

A compound resistor is formed of a resistive material making up a predominant portion of the resistance and having a small negative TCR coupled with an adjustment material having an extremely low resistance and a very high positive temperature coefficient of resistance. After the manufacturing process, a portion of the adjustment material is removed to adjust the composite TCR of the compound resistor substantially to zero without significantly affecting the resistance.