Santosh Prasad Gaur

US Patent:

6404752, Jun 11, 2002

Filed:

Aug 27, 1999

Appl. No.:

09/384747

Inventors:

Brian Mitchell Bass - Apex NC
Jean Louis Calvignac - Cary NC
Santosh Prasad Gaur - Raleigh NC
Marco C. Heddes - Raleigh NC
Michael Steven Siegel - Raleigh NC
Fabrice Jean Verplanken - Cary NC

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L 1228

US Classification:

370335, 370360, 370389, 370395, 370419

Abstract:

A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation among a plurality of interface processors and a suite of peripheral elements formed on a semiconductor substrate. The interface processors and peripherals together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.

US Patent:

6647004, Nov 11, 2003

Filed:

Oct 23, 2001

Appl. No.:

10/003981

Inventors:

Brian Mitchell Bass - Apex NC
Jean Louis Calvignac - Cary NC
Santosh Prasad Gaur - Raleigh NC
Marco C. Heddes - Raleigh NC
Michael Steven Siegel - Raleigh NC
Fabrice Jean Verplanken - Cary NC

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04B 7216

US Classification:

370335

Abstract:

A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation among a plurality of interface processors and a suite of peripheral elements formed on a semiconductor substrate. The interface processors and peripherals together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.

US Patent:

6842443, Jan 11, 2005

Filed:

Oct 23, 2001

Appl. No.:

10/002932

Inventors:

Brian Mitchell Bass - Apex NC, US
Jean Louis Calvignac - Cary NC, US
Santosh Prasad Gaur - Raleigh NC, US
Marco C. Heddes - Raleigh NC, US
Michael Steven Siegel - Raleigh NC, US
Fabrice Jean Verplanken - Cary NC, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L 1228
H04B 7216

US Classification:

370335, 370360, 370389, 37039561, 370419, 709227

Abstract:

A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation among a plurality of interface processors and a suite of peripheral elements formed on a semiconductor substrate. The interface processors and peripherals together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.

US Patent:

6868082, Mar 15, 2005

Filed:

Aug 30, 1999

Appl. No.:

09/385603

Inventors:

Brian Mitchell Bass - Apex NC, US
Jean Louis Calvignac - Cary NC, US
Santosh Prasad Gaur - Raleigh NC, US
Marco C. Heddes - Raleigh NC, US
Michael Steven Siegel - Raleigh NC, US
Fabrice Jean Verplanken - Cary NC, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L012/28
G06F013/28

US Classification:

370360, 711170, 710 20, 710 28

Abstract:

A network apparatus comprising storage units storing configuration information about the network apparatus, an input network interface to at least one network physical line, at least one processor receiving network data from said network interface, processing said data, storing information about said network data in said storage units, storing said data as formatted data units in said storage units, a first bus interface to two bus connections, a first hardware component reading said configuration information and said information about data stored in said storing units and steering said formatted data units stored in said storage units to at least one of the two bus connections of said first bus interface, a second bus interface to two bus connections, an output network interface to at least one network physical line, a second hardware component reading formatted data units arriving on at least one of the two bus connections of said second bus interface and storing said formatted data units in said storage units, said at least one processor reading said formatted data units from said storage units, processing them and sending them as network data to at least one network physical line through said output network interface. On the basis of this network processor, it is possible to build switching systems by adding one network processor and at least one switch; it is also possible to build double density blades attached to two redundant switch fabrics which can also be accessed concurrently.

US Patent:

6941292, Sep 6, 2005

Filed:

Nov 22, 2002

Appl. No.:

10/065819

Inventors:

Santosh Prasad Gaur - Raleigh NC, US
William Eric Hall - Clinton CT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F017/30

US Classification:

707 2, 707 1, 707 3, 707 4, 7071041, 707102, 707100

Abstract:

Aspects for optimizing data searches in tree structures are described. The aspects include organizing multiple search levels of data into sub-trees contained in fixed size blocks of shared external memory of an embedded processing system, and requiring each reference to the data to proceed from one-half of a sub-tree during a descent of the search tree based on a search pattern.

US Patent:

7117196, Oct 3, 2006

Filed:

Nov 22, 2002

Appl. No.:

10/065826

Inventors:

Santosh Prasad Gaur - Raleigh NC, US
William Eric Hall - Clinton CT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 17/30

US Classification:

707 2, 707101, 707 6, 707 3

Abstract:

Aspects for optimizing leaf comparisons from a tree search of data stored in external memory of an embedded processing system are described. The aspects include providing a control structure for leaf data comparisons as a control vector and a match key, and utilizing the control vector to direct types of comparison tests performed with the match key.

US Patent:

7564976, Jul 21, 2009

Filed:

Mar 2, 2004

Appl. No.:

10/791415

Inventors:

Santosh P. Gaur - Raleigh NC, US
William Eric Hall - Clinton CT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L 9/00
H04L 9/32
G06F 15/16
G06F 15/76

US Classification:

380277, 713153, 713189, 726 5, 712 13

Abstract:

A system and method are described for performing security operations on network data. According to an exemplary embodiment, a system for performing security operations on network data includes memory and a data coprocessor configured to transfer data into and out of the memory. A plurality of processors are coupled to the memory and to the data coprocessor. Each processor is configured to perform, in parallel to one another, security operations on a portion of the data. The system includes a plurality of security coprocessors coupled to the memory. Each security coprocessor is coupled to a respective one of the processors and configured to assist the respective processor in performing security operations on the portion of the data.

US Patent:

8468337, Jun 18, 2013

Filed:

Mar 2, 2004

Appl. No.:

10/790966

Inventors:

Santosh P. Gaur - Raleigh NC, US
William Eric Hall - Clinton CT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L 29/06

US Classification:

713153

Abstract:

A system and method are described for secure data transfer over a network. According to an exemplary embodiment a system for secure data transfer over a network includes memory and a memory controller configured to transfer data received from the network to the memory. The system includes a processor, having logic configured to retrieve a portion of the data from the memory using the memory controller. The processor also includes logic configured to perform security operations on the retrieved portion of the data, and logic configured to store the operated-on portion of the data in the memory using the memory controller. The memory controller is further configured to transfer the operated-on portion of the data from the memory to the network.