Saurabh G Gupta

US Patent:

7225284, May 29, 2007

Filed:

Aug 2, 2004

Appl. No.:

10/909657

Inventors:

Madhusudhan Rangarajan - Round Rock TX, US
Saurabh Gupta - Austin TX, US

Assignee:

Dell Products L.P. - Round Rock TX

International Classification:

G06F 13/00
G06F 13/24
G06F 13/36
G06F 13/12

US Classification:

710266, 310261, 310266, 310119, 310314, 310104, 310311, 310317, 310269, 713 1, 713 2, 711114, 711145, 717166

Abstract:

A method of increasing the quantity of input/output (I/O) decode ranges using system management interrupts (SMI) traps is disclosed. In one aspect, the present disclosure teaches a method of increasing the quantity of I/O decode ranges using SMI traps in a chipset including generating a system management interrupt (SMI) based on information causing access to an I/O address that triggers a SMI trap. The I/O address operably received at the chipset via a bus. The method further including automatically reprogramming a decode register in the chipset such that the I/O address forwards the information to a device on the bus.

US Patent:

7577813, Aug 18, 2009

Filed:

Oct 11, 2005

Appl. No.:

11/247036

Inventors:

Vijay B. Nijhawan - Austin TX, US
Saurabh Gupta - Federal Way WA, US
Wuxian Wu - Round Rock TX, US

Assignee:

Dell Products L.P. - Round Rock TX

International Classification:

G06F 12/00

US Classification:

711170, 711147, 711148, 711171, 711172, 711173

Abstract:

A system and method is disclosed for enumerating multi-level processor-memory affinities for non-uniform memory access systems. A processor-memory affinity hierarchy for each possible pairing of a microprocessor and a memory unit in an information-handling system is calculated using at least two characteristics relating to memory-access speed that describe how the microprocessors and memory units are arranged in the information-handling system. The information-handling system then performs an algorithm on each processor-memory affinity hierarchy to obtain processor-memory affinity values in the information-handling system, and populates a table using the processor-memory affinity values. An operating system in the information-handling system can use the table to allocate memory units among microprocessors in the information-handling system.

US Patent:

20070088988, Apr 19, 2007

Filed:

Oct 14, 2005

Appl. No.:

11/250603

Inventors:

Saurabh Gupta - Federal Way WA, US
Akkiah Maddukuri - Austin TX, US

International Classification:

G06F 11/00

US Classification:

714048000

Abstract:

In accordance with the present disclosure, a method and system for logging recoverable errors in an information handling system is disclosed. The system includes a central processing unit, a chipset coupled to the central processing unit, and at least one chipset memory unit coupled to and associated with the chipset. The system also includes a Baseboard Management Controller (BMC), and a memory unit containing a Basic Input Output System (BIOS). A System Management Interrupt (SMI) is periodically invoked. A status register is scanned to detect whether a recoverable error has occurred. If a recoverable error is detected, the system logs the recoverable error in a memory unit associated with the baseboard management controller. The system logs information that indicates a source of the recoverable error and that source's location. If no recoverable errors are detected, the system transmits a communication indicating that no recoverable errors have occurred.

US Patent:

20130124797, May 16, 2013

Filed:

Nov 15, 2011

Appl. No.:

13/297245

Inventors:

Jeffrey B. Hamblin - Issaquah WA, US
Saurabh Gupta - Bellevue WA, US
Justin Neddo - Kenmore WA, US
Joseph Sherman - Redmond WA, US

Assignee:

MICROSOFT CORPORATION - Redmond WA

International Classification:

G06F 12/00

US Classification:

711114, 711112, 711E12001

Abstract:

A virtual disk is comprised of segments of unused capacity of physical computer-readable storage media co-located with computing devices that are communicationally coupled to one another through network communications. The computing devices execute one or more of a client process, a storage process and a controller process. The controller processes manage the metadata of the virtual disk, including a virtual disk topology that defines the relationships between certain ones of the physical computer-readable storage media and a particular virtual disk. The client process provide data for storage to certain ones of the computing devices executing the storage processes, as defined by a virtual disk topology, and also read data from storage from those computing devices. The client process additionally expose the virtual disk in the same manner as any other computer-readable medium.

US Patent:

20130268739, Oct 10, 2013

Filed:

Dec 1, 2011

Appl. No.:

13/994150

Inventors:

Saurabh Gupta - Tacoma WA, US
Satish Muthiyalu - Bangalore, IN

International Classification:

G06F 3/06

US Classification:

711162

Abstract:

Method, apparatus and systems for performing hardware-based memory migration and copy operations. Under the method, a first portion of memory in a computer system accessed via a first memory controller is migrated or copied to a second portion of memory accessed via a second memory controller using a hardware-based scheme that is implemented independent of and transparent to software running on a computer system. The memory migration and/or copy operations can be used to initialize a memory mirror configuration under which data in first and second portions of memory are mirrored, and to perform memory migration operations in which data in a first portion of memory is migrated to a second portion of memory under the control of hardware in a manner in which the memory migration can be performed during run-time without a significant reduction in performance. In addition, poison data indicating failed cache lines may be migrated or copied such that data corresponding to migrated or copied poisoned cache lines are not used.

US Patent:

20180285115, Oct 4, 2018

Filed:

Apr 1, 2017

Appl. No.:

15/477064

Inventors:

- Santa Clara CA, US
Saurabh Gupta - Tacoma WA, US
Sreenivas Subramoney - Bangalore, IN
Rahul Pal - Bangalore, IN
Ragavendra Natarajan - Mysore, IN
Daniel Deng - Santa Clara CA, US
Jared W. Stark - Portland OR, US
Ronak Singhal - Portland OR, US
Hong Wang - Santa Clara CA, US

International Classification:

G06F 9/38
G06F 9/30
G06F 9/46

Abstract:

Embodiments of apparatuses, methods, and systems for misprediction-triggered local history-based branch prediction are described. In one embodiments, an apparatus includes a current pattern table and a local pattern table. The current pattern table has a plurality of entries, each entry in which to store a plurality of pattern lengths of a current pattern of one of a plurality of branch instructions. The local pattern table is to provide a first branch prediction based on the current pattern.

US Patent:

20170061250, Mar 2, 2017

Filed:

Aug 28, 2015

Appl. No.:

14/839430

Inventors:

- Redmond WA, US
Xiaodong He - Sammamish WA, US
Saurabh Gupta - Berkeley CA, US
Geoffrey G. Zweig - Sammamish GA, US
Forrest Iandola - Berkeley CA, US
Li Deng - Redmond WA, US
Hao Fang - Seattle WA, US
Margaret A. Mitchell - Seattle WA, US
John C. Platt - Bellevue WA, US
Rupesh Kumar Srivastava - Lugano, CH

International Classification:

G06K 9/62
G06F 17/27
G06K 9/00
G06K 9/52
G06T 7/60

Abstract:

Disclosed herein are technologies directed to discovering semantic similarities between images and text, which can include performing image search using a textual query, performing text search using an image as a query, and/or generating captions for images using a caption generator. A semantic similarity framework can include a caption generator and can be based on a deep multimodal similar model. The deep multimodal similarity model can receive sentences and determine the relevancy of the sentences based on similarity of text vectors generated for one or more sentences to an image vector generated for an image. The text vectors and the image vector can be mapped in a semantic space, and their relevance can be determined based at least in part on the mapping. The sentence associated with the text vector determined to be the most relevant can be output as a caption for the image.

US Patent:

20150095644, Apr 2, 2015

Filed:

Sep 27, 2013

Appl. No.:

14/040026

Inventors:

Saurabh Gupta - Tacoma WA, US
Vincent J. Zimmer - Federal Way WA, US

International Classification:

H04L 9/12
H04L 9/32

US Classification:

713168, 713150

Abstract:

Methods and apparatus related to performance of telemetry, data gathering, and failure isolation using non-volatile memory are described. In one embodiment, a Non-Volatile Memory (NVM) controller logic stores data in a portion of an NVM device. The portion of the NVM device is determined based at least in part on a type or an identity of a sender of the data. Also, the data is encrypted in accordance with a public key provided by the sender. Other embodiments are also disclosed and claimed.