Scott T Irwin

US Patent:

6976102, Dec 13, 2005

Filed:

Sep 11, 2003

Appl. No.:

10/660159

Inventors:

Eric D. Groen - Ankeny IA, US
Charles W. Boecker - Ames IA, US
William C. Black - Ames IA, US
Scott A. Irwin - Ames IA, US
Joseph N. Kryzak - Ames IA, US
Aaron J. Hoelscher - Ankeny IA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

G06F013/38

US Classification:

710 72, 710105, 710100, 710106, 326 38

Abstract:

Method and apparatus for auto-negotiation of a programmable logic device for any of a plurality of communication protocols is described. The programmable logic device is programmed for auto negotiation to establish a communication session. The programmable logic device has access to transceiver attributes. A portion of the transceiver attributes are selected in response to session information from the auto negotiation. The portion of the transceiver attributes selected are for configuring at least one transceiver for a communication protocol.

US Patent:

7167410, Jan 23, 2007

Filed:

Apr 26, 2005

Appl. No.:

11/114807

Inventors:

Charles Boecker - Ames IA, US
Scott Irwin - Ames IA, US
Matthew Shafer - Ankeny IA, US
Eric Groen - Ankeny IA, US
Aaron Hoelscher - Ankeny IA, US
Andrew Jenkins - Nevada IA, US
David Black - Story City IA, US

Assignee:

Magnalynx - Ames IA

International Classification:

G11C 8/00

US Classification:

36523006, 365233, 365221, 326 41, 331 53

Abstract:

A memory device and system are disclosed that may include a serial data interface, a serial address interface, and a reference clock interface. The reference clock interface is configured to receive a signal from a reference clock source that provides a reference clock signal to a memory control device. The serial interfaces are coupled to other memory devices or memory control devices. A method of transferring data within a memory system using serial interfaces is also disclosed. The method includes performing clock multiplication on a reference clock to provide a multiplied clock, using the multiplied clock to serialize and transmit data onto a serial interface, recovering data from the seal interface, using the reference clock to determine an initial frequency for use by clock and data recovery module, using the data recovered from the serial interface to determine a phase and final frequency of a recovered clock, and using the recovered clock to de-serialize received serial data into parallel data words.

US Patent:

7188283, Mar 6, 2007

Filed:

Sep 11, 2003

Appl. No.:

10/660243

Inventors:

Matthew S. Shafer - Ankeny IA, US
Bodhisattva Das - Ames IA, US
William C. Black - Ames IA, US
Scott A. Irwin - Ames IA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

G01R 31/28
G06F 11/00

US Classification:

714725, 714 3

Abstract:

Method and apparatus for configuring a programmable logic device to perform testing on a signal channel is described. Configurable logic of the programmable logic device is configured for a test mode. Configurable interconnects are configured for communication from or to the configurable logic to or from transceivers coupled to the configurable input/output interconnect to communicate test signals.

US Patent:

7389273, Jun 17, 2008

Filed:

Sep 25, 2003

Appl. No.:

10/671396

Inventors:

Scott Andrew Irwin - Winter Springs FL, US
Robert Dennis Birch - Orlando FL, US
Joseph Paul Lupo - Apopka FL, US
Stephen DeWayne Weagraff - Orlando FL, US

International Classification:

G06F 17/60

US Classification:

705 59, 705 1, 705 51, 705 57, 713200

Abstract:

A system is disclosed for a digital rights management system which enforces license rights by establishing an account domain of registered consumer devices which may each receive a decryption key to be used to decode digital content bought by any of the devices within the account domain. Such system further enables the decentralization of content sharing by establishing a network of trusted intermediate devices to manage licenses on end devices for a central rights provider.

US Patent:

7406118, Jul 29, 2008

Filed:

Sep 11, 2003

Appl. No.:

10/661016

Inventors:

Eric D. Groen - Ankeny IA, US
Charles W. Boecker - Ames IA, US
William C. Black - Ames IA, US
Scott A. Irwin - Ames IA, US
Joseph N. Kryzak - Ames IA, US
Yiqin Chen - Ames IA, US
Andrew G. Jenkins - Nevada IA, US
Aaron J. Hoelscher - Ankeny IA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H04B 1/38

US Classification:

375219

Abstract:

A programmable logic device includes a plurality of programmable multi-gigabit transceivers, programmable logic fabric, and a control module. Each of the plurality of programmable multi-gigabit transceivers is individually programmed to a desired transceiving mode of operation in accordance with a plurality of transceiver settings. The programmable logic fabric is operably coupled to the plurality of programmable multi-gigabit transceivers and is configured to process at least a portion of the data being transceived via the multi-gigabit transceivers. The control module is operably coupled to produce the plurality of transceiver settings based on a desired mode of operation for the programmable logic device.

US Patent:

7496540, Feb 24, 2009

Filed:

Aug 19, 2003

Appl. No.:

10/643712

Inventors:

Scott Andrew Irwin - Winter Springs FL, US
Robert Dennis Birch - Orlando FL, US
Joseph Paul Lupo - Apopka FL, US
Stephen DeWayne Weagraff - Orlando FL, US

Assignee:

Convergys CMG Utah - Salt Lake City UT

International Classification:

H04K 1/00
H04L 9/00

US Classification:

705 59, 705 51, 705 50, 705 58, 705 57, 705 64, 705 65, 705 66, 705 69

Abstract:

A system is disclosed for a digital rights management system which enforces license rights by incorporating a decryption key in a license rights package that further includes an account number associated with a primary consumer. The digital rights management system also includes a mechanism for renewing/updating the license by charging the account number associated with a primary consumer. This way, the consumer may transfer the license rights package along with the digital content to any personal devices he likes but he is discouraged from freely disseminating the license package as uses by other consumers will be debited against his package or, if renewed/extended, charged against his account.

US Patent:

7546499, Jun 9, 2009

Filed:

Jan 29, 2007

Appl. No.:

11/699113

Inventors:

Matthew S. Shafer - Ankeny IA, US
Bodhisattva Das - Ames IA, US
William C. Black - Ames IA, US
Scott Alan Irwin - Ames IA, US

Assignee:

XILINX, Inc. - San Jose CA

International Classification:

G01R 31/28

US Classification:

714725, 714738

Abstract:

Method and apparatus for configuring a programmable logic device to perform testing on a signal channel is described. Configurable logic of the programmable logic device is configured for a test mode. Configurable interconnects are configured for communication from or to the configurable logic to or from transceivers coupled to the configurable input/output interconnect to communicate test signals.

US Patent:

7599396, Oct 6, 2009

Filed:

Jul 11, 2005

Appl. No.:

11/178958

Inventors:

Charles Boecker - Ames IA, US
Scott Irwin - Ames IA, US
Matthew Shafer - Ankeny IA, US
Eric Groen - Ankeny IA, US
Aaron Hoelscher - Ankeny IA, US
Andrew Jenkins - Nevada IA, US
David Black - Story City IA, US

Assignee:

Magnalynx, Inc. - Ames IA

International Classification:

H04J 3/06

US Classification:

370474, 370503

Abstract:

The present disclosure is generally directed to a method of communicating data between two or more semiconductor devices. Serial interfaces using the method have a reduction in latency compared to conventional serial interfaces. The method enables features needed for a serial interface, such as limited run lengths and recognizable data boundaries to establish alignment. In addition, a method for synchronizing two or more semiconductor devices through serial interfaces has been presented. This is done by passing a marker data pattern through the system.