Scott R Mcleod

US Patent:

6924760, Aug 2, 2005

Filed:

Feb 27, 2004

Appl. No.:

10/789903

Inventors:

Scott C. McLeod - Oro Valley AZ, US
Aniruddha Bashar - Tucson AZ, US

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

H03M001/66

US Classification:

341144, 341172

Abstract:

In one set of embodiments the invention comprises a highly accurate, low-power, compact size DAC utilizing charge redistribution techniques. Two complementary conversions may be performed and added together to form a final DAC output voltage by performing charge redistribution a first time, and again a second time in a complementary fashion, followed by a summing of the two charge distributions, in effect canceling the odd order capacitor mismatch errors. By canceling all odd order mismatch errors the accuracy of the DAC may become a function of the square of the mismatch of the two capacitors, resulting in greatly increased accuracy. When performing the complementary conversions for multiple bits, the sequence in which each of the two capacitors is charged may be determined to minimize the even-order errors, especially second-order errors. The DEM technique may be applied, in conjunction with the complementary conversions, with less oversampling than required by current DEM implementations, resulting in even-order errors being substantially reduced in addition to all odd-order errors being eliminated.

US Patent:

7030793, Apr 18, 2006

Filed:

Feb 18, 2004

Appl. No.:

10/781063

Inventors:

Scott C. McLeod - Oro Valley AZ, US
William Castellano - Syosset NY, US

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

H03M 1/06

US Classification:

341119, 341144

Abstract:

Various embodiments of a method and apparatus for simulating temperature characteristics of a diode are disclosed. The output of a diode simulator may not depend upon its ambient temperature. Therefore, it may be used to calibrate a temperature measurement unit at any ambient temperature within its operational range regardless of the temperature to which the temperature measurement unit is to be calibrated. Even if the ambient temperature of the facility in which the calibration is performed varies during the calibration procedure, the output of the diode simulator may remain constant. These characteristics of the diode simulator may allow for calibration of a temperature measurement unit in significantly less time than by using prior art methods, which include the requirement to tightly control the temperature of one or more system components.

US Patent:

7140767, Nov 28, 2006

Filed:

Nov 2, 2004

Appl. No.:

10/979437

Inventors:

Scott C. McLeod - Oro Valley AZ, US
Thomas R. Anderson - Tucson AZ, US
Steven Burstein - Smithtown NY, US
Leonid A. Bekker - Holbrook NY, US

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

G01K 19/00
G01K 7/00

US Classification:

374178, 374 1

Abstract:

A temperature sensor circuit and system providing accurate readings using a temperature diode whose ideality factor may fall within a determined range. In one set of embodiments a change in diode junction voltage (ΔV) proportional to the temperature of the diode is captured and provided to an ADC, which may perform required signal conditioning functions on ΔV, and provide a numeric value output corresponding to the temperature of the diode. Errors in the measured temperature that might result from using diodes with ideality factors that differ from an expected ideality factor may be eliminated by programming the system to account for differing ideality factors. The gain of the temperature sensor may be matched to the ideality factor of the temperature diode by using an accurate, highly temperature stable reference voltage of the ADC to set the gain of the temperature measurement system. The reference voltage may have a trim capability to change the gain setting voltage by a digital address comprising a determined number of bits, with the programmable range for the reference voltage corresponding to a determined range of ideality factors.

US Patent:

7193543, Mar 20, 2007

Filed:

Sep 2, 2005

Appl. No.:

11/219399

Inventors:

Scott C. McLeod - Oro Valley AZ, US
Kenneth W. Gay - Tucson AZ, US

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

H03M 1/00

US Classification:

341123, 374170

Abstract:

In one set of embodiments, a temperature measurement system may include an analog to digital converter (ADC) to produce digital temperature readings according to a difference base-emitter voltage (ΔV) developed across a PN-junction. A clock generating circuit may be configured to provide a sampling clock used by the ADC, which in some embodiments may be a delta-sigma ADC, in performing the conversions. The clock generating circuit may be configured to change the frequency of the sampling clock a specified number of times within each one of the one or more conversion cycles to reduce an error component in the temperature measurement, where the error component is produced by an interfering signal, such as an electromagnetic interference (EMI) signal being coherent with the sampling clock, and/or a noise residing on the voltage supply and also being coherent with the sampling clock.

US Patent:

7281846, Oct 16, 2007

Filed:

Aug 23, 2004

Appl. No.:

10/924176

Inventors:

Scott C. McLeod - Oro Valley AZ, US

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

G01K 7/01

US Classification:

374178, 327513, 374172

Abstract:

A temperature measurement device may be implemented by coupling a PN-junction, which may be comprised in a diode, to an analog-to-digital converter (ADC) that comprises an integrator. Different currents may be successively applied to the diode, resulting in different Vvalues across the diode. The ΔVvalues thus obtained may be successively integrated. Appropriate values for the different currents may be determined based on a set of mathematical equations, each equation relating the Vvalue to the temperature of the diode, the current applied to the diode and parasitic series resistance associated with the diode. When the current sources with the appropriate values are sequentially applied to the diode and the resulting diode voltage differences are integrated by the integrator comprised in the ADC, the error in the temperature measurement caused by series resistance is canceled in the ADC, and an accurate temperature reading of the diode is obtained from the output of the ADC.

US Patent:

7332952, Feb 19, 2008

Filed:

Nov 23, 2005

Appl. No.:

11/286706

Inventors:

Scott C. McLeod - Oro Valley AZ, US
Aniruddha Bashar - Laveen AZ, US

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

H03K 17/78

US Classification:

327512, 327378

Abstract:

An accurate temperature monitoring system that uses a precision current control circuit to apply accurately ratioed currents to a semiconductor device, which may be a bipolar junction transistor (BJT), used for sensing temperature. A change in base-emitter voltage (ΔV) proportional to the temperature of the BJT may be captured and provided to an ADC, which may generate a numeric value corresponding to that temperature. The precision current control circuit may be configured to generate a reference current, capture the base current of the BJT, generate a combined current equivalent to a sum total of the base current and a multiple of the reference current, and provide the combined current to the emitter of the BJT. In response to this combined current, the collector current of the BJT will be equivalent to the multiple of the reference current. The ratios of the various collector currents conducted by the BJT may thus be accurately controlled, leading to more accurate temperature measurements.

US Patent:

7429129, Sep 30, 2008

Filed:

Feb 28, 2005

Appl. No.:

11/068250

Inventors:

Robert St. Pierre - Tucson AZ, US
Scott C. McLeod - Oro Valley AZ, US

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

G01K 7/16

US Classification:

374178, 327512, 702130

Abstract:

A temperature sensor circuit and system providing accurate digital temperature readings using a local or remote temperature diode. In one set of embodiments a change in diode junction voltage (ΔV) proportional to the temperature of the diode is captured and provided to an analog to digital converter (ADC), which may perform required signal conditioning functions on ΔV, and provide a digital output corresponding to the temperature of the diode. DC components of errors in the measured temperature that may result from EMI noise modulating the junction voltage (V) may be minimized through the use of a front-end sample-and-hold circuit coupled between the diode and the ADC, in combination with a shunt capacitor coupled across the diode junction. The sample-and-hold-circuit may sample Vat a frequency that provides sufficient settling time for each Vsample, and provide corresponding stable ΔVsamples to the ADC at the ADC operating frequency. The ADC may therefore be operated at its preferred sampling frequency rate without incurring reading errors while still averaging out AC components of additional errors induced by sources other than EMI.

US Patent:

7433790, Oct 7, 2008

Filed:

Jun 6, 2005

Appl. No.:

11/145906

Inventors:

Thomas R. Anderson - Tucson AZ, US
William Castellano - Syosset NY, US
Scott C. McLeod - Oro Valley AZ, US

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

G01D 21/00

US Classification:

702 85, 702 99, 374171

Abstract:

In one set of embodiments, trimming of a reference, which may be a bandgap reference and which is configured on an integrated circuit, may be controlled by an algorithm executed by logic circuitry also configured on the integrated circuit. The bandgap reference may be configured to generate a reference voltage provided to an analog to digital converter (ADC) comprised in a temperature sensor that may also be configured on the integrated circuit. The logic circuitry may be configured to execute one or more of a variety of test algorithms, for example a Successive Approximation Method or remainder processing, that are operable to adjust values of reference trim bits used in trimming the bandgap reference. A tester system configured to perform testing of the integrated circuit may initiate execution of the test algorithm, thereby initiating the trimming process, and may wait for the test algorithm to complete within a previously defined amount of time, or may poll the logic circuitry to determine when the trimming process is complete.