Scott T Robins

age ~64

from Davenport, CA

Also known as:
  • Scott Thomas Robins

Scott Robins Phones & Addresses

  • Davenport, CA
  • The Sea Ranch, CA
  • Santa Cruz, CA
  • 6678 Charter Oak Pl, San Jose, CA 95120 • 4082685462
  • Sunnyvale, CA
  • Berkeley, CA
  • 6678 Charter Oak Pl, San Jose, CA 95120

Work

  • Company:
    T-ram semiconductor incorporated
  • Address:
    620 N Mccarthy Blvd, Milpitas, CA 95035
  • Phones:
    4085973670
  • Position:
    Vice president technology
  • Industries:
    Semiconductors and Related Devices

Education

  • Degree:
    High school graduate or higher

Resumes

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Scott Robins

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Location:
United States
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Scott Robins

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Location:
United States
Name / Title
Company / Classification
Phones & Addresses
Scott Robins
Vice President Technology
T-Ram Semiconductor Incorporated
Semiconductors and Related Devices
620 N Mccarthy Blvd, Milpitas, CA 95035
Scott Robins
VP Systems
Ericsson Inc
Computer Systems Design
100 Headquarters Dr, San Jose, CA 95134
4087505000
Scott Robins
Vice President Technology
T-RAM SEMICONDUCTOR INCORPORATED
Mfg Semiconductors/Related Devices
2109 Landings Dr, Mountain View, CA 94043
620 N Mccarthy Blvd, Milpitas, CA 95035
4085973670

Us Patents

  • Thyristor-Based Device Having Extended Capacitive Coupling

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  • US Patent:
    6583452, Jun 24, 2003
  • Filed:
    Dec 17, 2001
  • Appl. No.:
    10/023060
  • Inventors:
    Hyun-Jin Cho - Palo Alto CA
    Andrew Horch - Sunnyvale CA
    Scott Robins - San Jose CA
    Farid Nemati - Menlo Park CA
  • Assignee:
    T-RAM, Inc. - Mountain View CA
  • International Classification:
    H01L 2974
  • US Classification:
    257107, 257133, 257147
  • Abstract:
    A thyristor-based semiconductor device has a thyristor that exhibits increased capacitive coupling between a conductive structure and a portion of a thyristor. According to an example embodiment of the present invention, the thyristor-based semiconductor device is manufactured having an extended portion that is outside a current path through the thyristor and that capacitively couples a conductive structure to a portion of the thyristor for controlling the current through the path. In one particular implementation, the extended portion extends from a base region of the thyristor and is outside of a current path through the base region and between an adjacent base region and an adjacent emitter region. A gate is formed capacitively coupled to the base region via the extended portion. In this manner, the control of the thyristor with the gate exhibits increased capacitive coupling, as compared to the control without the extended portion.
  • Thyristor-Based Device Over Substrate Surface

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  • US Patent:
    6653174, Nov 25, 2003
  • Filed:
    Dec 17, 2001
  • Appl. No.:
    10/023052
  • Inventors:
    Hyun-Jin Cho - Palo Alto CA
    Andrew Horch - Mountain View CA
    Scott Robins - San Jose CA
    Farid Nemati - Menlo Park CA
  • Assignee:
    T-RAM, Inc. - San Jose CA
  • International Classification:
    H01L 21332
  • US Classification:
    438133, 438135, 257133
  • Abstract:
    A semiconductor device having a thyristor is manufactured in a manner that reduces or eliminates manufacturing difficulties commonly experienced in the formation of such devices. According to an example embodiment of the present invention, a thyristor is formed having some or all of the body of the thyristor extending above a substrate surface of a semiconductor device. The semiconductor device includes at least one transistor having source/drain regions formed in the substrate prior to the formation of the thyristor. One or more layers of material are deposited on the substrate surface and used to form a portion of a body of the thyristor that includes anode and cathode end portions. Each end portion is formed having a base region and an emitter region, and at least one of the end portions includes a portion that is in the substrate and electrically coupled to the transistor. A control port is formed capacitively coupled to at least one of the base regions.
  • Stability In Thyristor-Based Memory Device

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  • US Patent:
    6653175, Nov 25, 2003
  • Filed:
    Aug 28, 2002
  • Appl. No.:
    10/231805
  • Inventors:
    Farid Nemati - Menlo Park CA
    Hyun-Jin Cho - Palo Alto CA
    Scott Robins - San Jose CA
  • Assignee:
    T-Ram, Inc. - Mountain View CA
  • International Classification:
    H01L 21332
  • US Classification:
    438133, 257109, 257137, 257335, 257750, 365 96
  • Abstract:
    A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt that effects a leakage current in the thyristor. The thyristor includes a capacitively-coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region. In one implementation, the current shunt is located between the emitter and base region of one of the end portions of the thyristor and is configured and arranged to shunt low-level current therebetween. In connection with an example embodiment, it has been discovered that shunting current in this manner improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.
  • Shunt Connection To Emitter

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  • US Patent:
    6666481, Dec 23, 2003
  • Filed:
    Oct 1, 2002
  • Appl. No.:
    10/262728
  • Inventors:
    Andrew Horch - Sunnyvale CA
    Scott Robins - San Jose CA
  • Assignee:
    T-Ram, Inc. - San Jose CA
  • International Classification:
    H01L 29423
  • US Classification:
    287133, 257137, 257146, 257163
  • Abstract:
    A semiconductor device is formed having a thyristor, a pass device and a conductive shunt that electrically connects an emitter region of the thyristor with a node near an upper surface of the substrate. In one example embodiment of the present invention, the conductive shunt is formed in a trench in a substrate and extending from an upper surface of the substrate to an emitter region of a vertical thyristor, with the emitter region being in the substrate and below the upper surface. In one implementation, the thyristor includes a thyristor body and a control port, with an N+ emitter region of the thyristor body being in the substrate and below and upper surface thereof. A pass device is formed adjacent to the thyristor, and the conductive shunt is formed in a trench extending from the N+ emitter region to a source/drain region of the pass device. With this approach, thyristor applications can be implemented having an emitter region in a substrate and not necessarily directly accessible, for example, via an upper surface of the substrate. This approach is also useful, for example, in applications where a cathode-down thyristor is used, such as when it is desirable to form the thyristor control port near a bottom portion of the thyristor, and in high-density circuit applications, such as memory arrays.
  • Recessed Thyristor Control Port

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  • US Patent:
    6683330, Jan 27, 2004
  • Filed:
    Oct 1, 2002
  • Appl. No.:
    10/262697
  • Inventors:
    Andrew Horch - Sunnyvale CA
    Scott Robins - San Jose CA
  • Assignee:
    T-Ram, Inc. - San Jose CA
  • International Classification:
    H01L 2974
  • US Classification:
    257133, 257146, 257163, 257170
  • Abstract:
    A semiconductor device is formed including a substrate having an upper surface, a thyristor region in the substrate and a control port adapted for capacitively coupling to at least a portion of the thyristor region via a dielectric material. According to an example embodiment of the present invention, a trench is formed in the substrate and subsequently filled with materials including dielectric material and a control port. The control port is adapted for capacitively coupling to the thyristor via the dielectric material for controlling current flow in the thyristor (e. g. , for causing an outflow of minority carriers from a portion of the thyristor for switching the thyristor from conducting state to a blocking state). A portion of the substrate adjacent to the upper surface is implanted with a species of ions, and the dielectric material via which the control port capacitively couples to the thyristor does not include the species of ions. In one implementation, a filled portion of the trench over the control port inhibits ions from implanting the dielectric material.
  • Thyristor-Based Device Adapted To Inhibit Parasitic Current

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  • US Patent:
    6686612, Feb 3, 2004
  • Filed:
    Oct 1, 2002
  • Appl. No.:
    10/263382
  • Inventors:
    Andrew Horch - Sunnyvale CA
    Scott Robins - San Jose CA
  • Assignee:
    T-Ram, Inc. - San Jose CA
  • International Classification:
    H01L 29423
  • US Classification:
    257133, 257146
  • Abstract:
    Parasitic current leakage from a thyristor-based semiconductor device is inhibited. According to an example embodiment of the present invention, a thyristor-based semiconductor device includes a thyristor body portion and a control port located in a substrate, the control port being adapted for capacitively coupling to the thyristor body portion for controlling current flow therein. The substrate further includes a doped circuit region separated by a channel region from another doped region of similar polarity in the substrate. The control port faces the channel region in the substrate, and the channel region is susceptible to current leakage in response to voltage pulses being applied to the control port for controlling current flow in the thyristor. The device is arranged such that such current leakage in the channel is inhibited while pulses are applied to the control port for controlling current flow in the thyristor; the parasitic current leakage between the doped circuit region and the doped region in the substrate is inhibited.
  • Thyristor-Based Device Over Substrate Surface

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  • US Patent:
    6690038, Feb 10, 2004
  • Filed:
    Jul 23, 2002
  • Appl. No.:
    10/200987
  • Inventors:
    Hyun-Jin Cho - Palo Alto CA
    Andrew Horch - Mountain View CA
    Scott Robins - San Jose CA
    Farid Nemati - Menlo Park CA
  • Assignee:
    T-Ram, Inc. - San Jose CA
  • International Classification:
    H01L 29423
  • US Classification:
    257133, 257147, 257155, 365180
  • Abstract:
    A semiconductor device having a thyristor is arranged in a manner that reduces or eliminates manufacturing difficulties commonly experienced in the formation of such devices, as well as facilitates the implementation of the semiconductor device in a variety of applications. According to an example embodiment of the present invention, a thyristor is formed having some or all of the body of the thyristor extending above a substrate surface of a semiconductor device. The semiconductor device includes at least one transistor having source/drain regions formed in the substrate prior to the formation of the thyristor. One or more layers of material are deposited on the substrate surface and used to form a portion of a body of the thyristor that includes anode and cathode end portions. Each end portion is formed having a base region and an emitter region, and at least one of the end portions includes a portion that is in the substrate and electrically coupled to the transistor. A control port is formed capacitively coupled to at least one of the base regions.
  • Thyristor-Based Device That Inhibits Undesirable Conductive Channel Formation

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  • US Patent:
    6690039, Feb 10, 2004
  • Filed:
    Oct 1, 2002
  • Appl. No.:
    10/262787
  • Inventors:
    Farid Nemati - Menlo Park CA
    Andrew Horch - Sunnyvale CA
    Scott Robins - San Jose CA
  • Assignee:
    T-Ram, Inc. - San Jose CA
  • International Classification:
    H01L 29423
  • US Classification:
    257133, 257138, 257153
  • Abstract:
    A semiconductor device is adapted to inhibit the formation of a parasitic MOS-inversion channel between an emitter region and a gated base in a capacitively-coupled thyristor device. According to an example embodiment of the present invention, a thyristor having first and second base regions coupled between emitter regions is gated, via one of the base regions, to a control port. The control port exhibits a workfunction between the control port and the base region that inhibits the formation of a conductive channel between the base region and an adjacent emitter region, such as when the semiconductor device is in a standby and/or a read mode for memory implementations. The workfunction is selected such that the parasitic MOS-inversion channel would turn on is sufficiently high to enable the operation of the device at voltages that are optimized for a particular implementation while remaining below V. With this approach, the thyristor can be operated without necessarily turning âonâ the parasitic MOS-inversion channel.

Medicine Doctors

Scott Robins Photo 3

Scott Robins

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Specialties:
Family Medicine, Adolescent Medicine
Work:
Jordan Valley Hyperbaric & Wound Care
3590 W 9000 S STE 105, West Jordan, UT 84088
8015624223 (phone), 8016012679 (fax)
Education:
Medical School
Midwestern University/ Arizona College of Osteopathic Medicine
Graduated: 2008
Procedures:
Wound Care
Conditions:
Acute Sinusitis
Allergic Rhinitis
Anxiety Phobic Disorders
Attention Deficit Disorder (ADD)
Bronchial Asthma
Languages:
English
Spanish
Description:
Dr. Robins graduated from the Midwestern University/ Arizona College of Osteopathic Medicine in 2008. He works in West Jordan, UT and specializes in Family Medicine and Adolescent Medicine. Dr. Robins is affiliated with Jordan Valley Medical Center and Jordan Valley Medical Center-West Valley Campus.

Googleplus

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Scott Robins

Work:
Scott Robins Photography - Owner
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Scott Robins

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Scott Robins

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Scott Robins

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Scott Robins

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Scott Robins

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Scott Robins

Lived:
San Jose CA
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Scott Robins

Plaxo

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Scott Robins

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TNT Sales

Youtube

Bosses tell Scott Robbins he's no longer want...

For April Fools, Markley had our friends at Compass Media Networks tel...

  • Duration:
    2m 28s

SCOTT ROBBINS AND THE TRAVELING SHOW | NOVEMB...

Enjoy the full San Diego Production of "Scott Robbins and the Travelin...

  • Duration:
    1h 38m 34s

Miami Today Profile Scott Robins

Scott Robins, founder and CEO of Scott Robins Companies, has been chan...

  • Duration:
    8m 3s

056 - Scott Robbins

Radio DJ Scott Robbins started on WIRL 40 years ago. In this interview...

  • Duration:
    33m 41s

Scott Robbins fulfills dream of hugging a dol...

When Scott Robbins returned to the radio after his two heart attacks, ...

  • Duration:
    7m 42s

EYES OF SCOTT ROBINS Chemotherapy Highlands A...

EYES OF SCOTT ROBINS Chemotherapy Highlands Ablaze Scottish Battle.

  • Duration:
    2m 23s

Classmates

Scott Robins Photo 13

Scott Villella (Robins)

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Schools:
Kachina Elementary School Phoenix AZ 1964-1972
Community:
Ted Bruner
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Scott Robins

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Schools:
St. Patrick's School Saint John NB 1985-1994
Community:
Roberta Maxwell, Alain Boucher, Jim Beckingham, Cheryle Holleran, Thomas Ervin
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Scott Robins

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Schools:
Lower Moreland High School Huntingdon Valley PA 1995-1999
Community:
Anita Knockers, Mark Evans
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Scott Robins

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Schools:
Maine North High School Des Plaines IL 1976-1980
Community:
Matt English, Dale Morrissey, Mary Saia, Adamina Rodriguez, Robert Stevenson
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Scott Robins

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Schools:
Gaskill Junior High School Niagara Falls NY 1978-1981
Community:
Cherrill Moshier, Joe Palladino, Marlene Ankenbauer, Roderick Crockett, Michele Ball
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Scott Robins

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Schools:
Walker High School Puyallup WA 1999-2003
Community:
Tony Cables, Patrick Mckillip, Rhonda Peck
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Scott Robins

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Schools:
Ninety Ninth Street Elementary School Niagara Falls NY 1970-1971, Military Road School Niagara Falls NY 1971-1973, Harry F. Abbott School Niagara Falls NY 1973-1975, Sixty Sixth Street Elementary School Niagara Falls NY 1975-1977, Thirty-Ninth Street School Niagara Falls NY 1977-1979, Gaskill Junior High School Niagara Falls NY 1977-1979
Community:
Socky Feinberg
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Scott Robins, Farragut Hi...

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Facebook

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Scott Robins

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Scott Robins

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Scott Robins

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Scott Robins Photo 24

Kieran Scott Robins

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Scott Robins

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Scott Robins

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Scott Robins

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Scott Robins

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Flickr

Myspace

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scott robins

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Locality:
puyallup, Washington
Gender:
Male
Birthday:
1941

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