Scott E Robins

US Patent:

7374974, May 20, 2008

Filed:

Mar 5, 2004

Appl. No.:

10/794843

Inventors:

Andrew Horch - Seattle WA, US
Scott Robins - San Jose CA, US

Assignee:

T-RAM Semiconductor, Inc. - Milpitas CA

International Classification:

H01L 21/332

US Classification:

438133, 438292, 438295, 438296, 438115, 257E21388, 257E21389, 257E2139, 257E21392

Abstract:

A thyristor-based semiconductor device includes a thyristor body that has at least one region in the substrate and a thyristor control port in a trenched region of the device substrate. According to an example embodiment of the present invention, the trench is at least partially filled with a dielectric material and a control port adapted to capacitively couple to the at least one thyristor body region in the substrate. In a more specific implementation, the dielectric material includes deposited dielectric material that is adapted to exhibit resistance to voltage-induced stress that thermally-grown dielectric materials generally exhibit. In another implementation, the dielectric material includes thermally-grown dielectric material, and when used in connection with highly-doped material in the trench, grows faster on the highly-doped material than on a sidewall of the trench that faces the at least on thyristor body region in the substrate. In still another implementation, the dielectric material includes both a thermally-grown dielectric material and a deposited dielectric material. These approaches are particularly useful, for example, in high-density and other applications where thermally-stable dielectric materials are desirable and/or where dielectric material growth at different rates is desirable.

US Patent:

7491586, Feb 17, 2009

Filed:

Jun 22, 2005

Appl. No.:

11/159514

Inventors:

Andrew E Horch - Seattle WA, US
Hyun-Jin Cho - Palo Alto CA, US
Farid Nemati - Redwood City CA, US
Scott Robins - San Jose CA, US
Rajesh N. Gupta - Mountain View CA, US
Kevin J. Yang - Santa Clara CA, US

Assignee:

T-RAM Semiconductor, Inc. - Milpitas CA

International Classification:

H01L 21/332
H01L 21/04
H01L 21/425

US Classification:

438133, 257163, 438139, 438140, 438510, 438515, 438527, 438529, 438530, 438531

Abstract:

A method of fabricating a thyristor-based memory may include forming different opposite conductivity-type regions in silicon for defining a thyristor and an access device in series relationship. An activation anneal may activate dopants previously implanted for the different regions. A damaging implant of germanium or xenon or argon may be directed into select regions of the silicon including at least one p-n junction region for the access device and the thyristor. A re-crystallization anneal may then be performed to re-crystallize at least some of the damaged lattice structure resulting from the damaging implant. The re-crystallization anneal may use a temperature less than that of the previous activation anneal.