Scott Alan Robinson

US Patent:

6725341, Apr 20, 2004

Filed:

Jun 28, 2000

Appl. No.:

09/605239

Inventors:

Jih-Kwon Peir - Gainsville FL
Steve Y. Zhang - Camas WA
Scott H. Robinson - Portland OR
Konrad Lai - Vancouver WA
Wen-Hann Wang - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1200

US Classification:

711141, 711142, 711143, 711144, 711130, 711117, 711118

Abstract:

The invention provides a cache management system comprising in various embodiments pre-load and pre-own functionality to enhance cache efficiency in shared memory distributed cache multiprocessor computer systems. Some embodiments of the invention comprise an invalidation history table to record the line addresses of cache lines invalidated through dirty or clean invalidation, and which is used such that invalidated cache lines recorded in an invalidation history table are reloaded into cache by monitoring the bus for cache line addresses of cache lines recorded in the invalidation history table. In some further embodiments, a write-back bit associated with each L2 cache entry records when either a hit to the same line in another processor is detected or when the same line is invalidated in another processors cache, and the system broadcasts write-backs from the selected local cache only when the line being written back has a write-back bit that has been set.

US Patent:

7076613, Jul 11, 2006

Filed:

Jan 21, 2004

Appl. No.:

10/761995

Inventors:

Jih-Kwon Peir - Gainsville FL, US
Steve Y. Zhang - Camas WA, US
Scott H. Robinson - Portland OR, US
Konrad Lai - Vancouver WA, US
Wen-Hann Wang - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 12/00

US Classification:

711141, 711118, 711121, 711124, 711142, 711143, 711144, 711128, 711137, 711147, 711205, 711206

Abstract:

The invention provides a cache management system comprising in various embodiments pre-load and pre-own functionality to enhance cache efficiency in shared memory distributed cache multiprocessor computer systems. Some embodiments of the invention comprise an invalidation history table to record the line addresses of cache lines invalidated through dirty or clean invalidation, and which is used such that invalidated cache lines recorded in an invalidation history table are reloaded into cache by monitoring the bus for cache line addresses of cache lines recorded in the invalidation history table. In some further embodiments, a write-back bit associated with each L2 cache entry records when either a hit to the same line in another processor is detected or when the same line is invalidated in another processor's cache, and the system broadcasts write-backs from the selected local cache only when the line being written back has a write-back bit that has been set.

US Patent:

7139808, Nov 21, 2006

Filed:

Apr 30, 2002

Appl. No.:

10/136756

Inventors:

Andrew V. Anderson - Hillsboro OR, US
Steven M. Bennett - Hillsboro OR, US
Scott H. Robinson - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 15/167
G06F 12/14

US Classification:

709212, 709231, 709247, 711161, 711162

Abstract:

A method is presented that includes generating a content identifier for at least one article. The content identifier identifies the article. Also, determining if at least a portion of the at least one article is present on at least one device based on the content identifier. The at least one portion of the at least one article is stored if the at least one portion of the at least one article is determined to be not present on the at least one device. Also presented is a method including requesting at least one article by a content identifier representing the article. The at least one article is determined if it is present on at least one device based on the content identifier. At least one portion of the at least one article is returned if the at least one portion of the at least one article is determined to be present on the at least one device.

US Patent:

7181521, Feb 20, 2007

Filed:

Mar 21, 2003

Appl. No.:

10/393617

Inventors:

Robert C. Knauerhase - Portland OR, US
Scott H. Robinson - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 15/16
G06F 15/173
G06F 15/177

US Classification:

709224, 709203, 709221, 709225, 709229

Abstract:

Currently, global registries, such as ones offered by Microsoft Corporation (uddi. microsoft. com) or Hewlett Packard Corporation (uddi. hp. com), are used to register services offered by or desired by networked devices. Unfortunately, these registries are highly centralized and designed to be repositories for long-lived services, and thus are not amenable to operation of mobile devices, such as laptop computers, personal digital assistants, and other devices whose network address may change frequently as they move in and out of various local network environments. Moreover, when such mobile devices form ad hoc networks, access to the centralized repositories may not be available. To address these issues, devices of a local network may be configured to dynamically select a local master, from among devices attached to the local network and based on characteristics of the devices, where the selected device operates a registry for the local network.

US Patent:

7188173, Mar 6, 2007

Filed:

Sep 30, 2002

Appl. No.:

10/262351

Inventors:

Andrew V. Anderson - Hillsboro OR, US
Scott H. Robinson - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 15/16

US Classification:

709225, 709229, 709223, 726 12

Abstract:

A method and apparatus to enable efficient processing and transmission of network communications are described. A network transmission directed to one or more destination nodes within a network is received. One or more network transmission items are identified in the network transmission. One or more item signatures associated with the one or more network transmission items are generated. Finally, a determination is made whether the one or more network transmission items can be transmitted to the one or more destination nodes by further processing the one or more item signatures.

US Patent:

7257257, Aug 14, 2007

Filed:

Aug 19, 2003

Appl. No.:

10/644445

Inventors:

Andrew V. Anderson - Hillsboro OR, US
Steven M. Bennett - Hillsboro OR, US
Scott H. Robinson - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06K 9/00

US Classification:

382187, 709212, 709231, 709247, 711161, 711162

Abstract:

A process is introduced that determines contour requirements from many factors. Based on the contour requirements, the process either generates at least one content-derived signature contour from either many content identifiers or at least one content-derived signature contour, or generates at least one optimized content-derived signature contour from contour-related data and either at least one content-derived signature contour or a derivation from at least one content-derived signature contour.

US Patent:

7631089, Dec 8, 2009

Filed:

Dec 31, 2002

Appl. No.:

10/335091

Inventors:

Robert C. Knauerhase - Portland OR, US
Scott H. Robinson - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 15/16

US Classification:

709229, 709203, 709219, 709223, 709224, 709225, 709227, 709232, 709226

Abstract:

Embodiments of the invention include an access policy enforcement system for a system that provides services to other devices. As a service-providing device changes environments, or mobile states, access to the device's services is automatically and transparently limited or expanded. One aspect of the access policy determines the particular state in which the service-providing device is operating. Another aspect uses the determined state to dictate which services will be available to other devices.

US Patent:

7735081, Jun 8, 2010

Filed:

Dec 17, 2004

Appl. No.:

11/016656

Inventors:

Scott H. Robinson - Portland OR, US
Vijay Tewari - Portland OR, US
Robert C. Knauerhase - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 9/455
G06F 3/00

US Classification:

718 1, 715700

Abstract:

A method, apparatus and system for transparently unifying virtual machines (“VMs”) is disclosed. An embodiment of the present invention enables a user to interact with various applications on a VM host while unaware of the VM structure on the VM host. The user may be presented with a unified desktop interface representing a composite and/or unified view of the VM host. Via this unified desktop interface, the user may perform all necessary commands and/or receive output. Invisible to the user, the unified desktop interface represents a unification console. The unification console may be an independent component (e. g. , an enhanced VM) and/or a subset of a virtual machine manager (“VMM”) component on the VM host. In either situation, the unification console may, alone and/or in conjunction with the VMM, route and/or redirect and/or transform and/or filter the user's commands to the appropriate applications and redirect and/or copy and/or transform and/or filter the output from the applications to be displayed in the unified desktop interface.