Scott M Robinson

US Patent:

6442620, Aug 27, 2002

Filed:

Aug 17, 1998

Appl. No.:

09/135397

Inventors:

Satish R. Thatte - Redmond WA
Richard D. Hill - Bellevue WA
Jan S. Gray - Redmond WA
Gopal Krishna R. Kakivaya - Redmond WA
Craig H. Wittenberg - Mercer Island WA
James M. Lyon - Redmond WA
Rebecca A. Norlander - Seattle WA
Eric W. Johnson - Redmond WA
Scott G. Robinson - Redmond WA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 944

US Classification:

709316, 709318

Abstract:

An object system provides composable object execution environment extensions with an object model that defines a framework with contexts, policies, policy makers and activators that act as object creation-time, reference creation-time and call-time event sinks to provide processing of effects specific to the environment extensions. At object creation time, an object instantiation service of the object system delegates to the activators to establish a context in which the object is created. The context contains context properties that represent particular of the composable environment extensions in which the object is to execute. The context properties also can act as policy makers that contribute policies to an optimized policy set for references that cross context boundaries. The policies in such optimized sets are issued policy events on calls across the context boundary to process effects of switching between the environment extensions of the two contexts.

US Patent:

6610344, Aug 26, 2003

Filed:

Oct 9, 2001

Appl. No.:

09/973219

Inventors:

Brian Keith Bell - Lewisville TX
Steven Theodore Chandler - Plano TX
Eric P. Farabaugh - Plano TX
Joseph H. Gold - Dallas TX
Perry L. Hanson - Dallas TX
Terry Dale Klockenga - Plano TX
Daniel Eugene Orr - Dallas TX
Edward Leon Ouellette - Corinth TX
Scott L. Robinson - Chicago IL
Richard James Ruegg - Coppell TX
Alexa W. Williams - The Colony TX

Assignee:

Recot, Inc. - Pleasanton CA

International Classification:

A23L 100

US Classification:

426439, 426138, 426241, 426502, 426503, 426512

Abstract:

The process for making a shaped snack chip uses various components to form a chip having depth such as a bowl-shaped tortilla chip. The chips are formed by sheeting into an initial flat shape. The chips are then passed along for shaping by a mold and plunger conveyor. Once plunged to the mold shape, the chips are reduced in moisture content by baking and frying. After frying, oil is evacuated from the chips whereafter salt and flavoring is applied, if desired, prior to being packaged.

US Patent:

6628879, Sep 30, 2003

Filed:

Jul 26, 2001

Appl. No.:

09/916562

Inventors:

Scott Thomas Robinson - Redmond WA
Michael Masatsugu Itano - Seattle WA

Assignee:

Leviton Manufacturing Co., Inc. - Little Neck NY

International Classification:

B26D 308

US Classification:

385134, 385147, 225 96, 225 965

Abstract:

An adapter for an optical fiber cleaver for cleaving optical fiber. The optical fiber cleaver includes an opening therein for receiving a connector ferrule of a first category fiber connector containing an unsheathed optical fiber end portion extending therebeyond. The optical fiber cleaver is designed to cleave a portion of the unsheathed optical fiber end portion extending beyond the connector ferrule. The adapter has a tail piece which can hold an unsheathed optical fiber end portion to be cleaved to a selected length prior to insertion into a second category fiber connector. The tail piece has a diameter similar to the ferrule for insertion into the cleaver opening and a length selected to produce a cleaved unsheathed optical fiber end portion of a length needed for the second category fiber connector different than the length cut by the cleaver for the first category fiber connector.

US Patent:

6638553, Oct 28, 2003

Filed:

Oct 9, 2001

Appl. No.:

09/973144

Inventors:

Brian Keith Bell - Lewisville TX
Steven Theodore Chandler - Plano TX
Eric P. Farabaugh - Plano TX
Joseph H. Gold - Dallas TX
Terry Dale Klockenga - Plano TX
John Curtis McConn - Bakersfield CA
Daniel Eugene Orr - Dallas TX
Edward Leon Ouellette - Corinth TX
Scott L. Robinson - Chicago IL
Heinz Roel - Prosper TX
Richard James Ruegg - Coppell TX

Assignee:

RECOT, Inc. - Pleasanton CA

International Classification:

A21C 900

US Classification:

426496, 99352, 99386, 99443 C, 198602, 426523

Abstract:

The system and method for monolayer alignment snack chip transfer process a snack chip from a first to a second conveyor. By using a roll at the discharge of the toast oven conveyor that has a diameter that is substantially closer in size to the pickup roll of the second conveyor, mechanical devices for lifting the chips off of the toast oven conveyor can be avoided. Further, chip preforms alignment in passing between the two conveyors is maintained.

US Patent:

7437711, Oct 14, 2008

Filed:

Aug 4, 2003

Appl. No.:

10/633911

Inventors:

Christopher W. Brumme - Mercer Island WA, US
James M. Lyon - Redmond WA, US
Michael J. Toutonghi - Seattle WA, US
Satish R. Thatte - Redmond WA, US
Gopal Krishna R. Kakivaya - Redmond WA, US
Richard D. Hill - Kirkland WA, US
Jan S. Gray - Bellevue WA, US
Craig H. Wittenberg - Mercer Island WA, US
Rebecca A. Norlander - Seattle WA, US
Scott G. Robinson - Duvall WA, US
Eric W. Johnson - Redmond WA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 9/45

US Classification:

717120

Abstract:

Communication among agile objects and context-bound objects within object-oriented programming environments, including communication across contextual boundaries, is disclosed. In one embodiment, a reference to a second object within a second context is wrapped in a proxy wrapper. A first object within a first context calls the second object via the wrapped reference. No direct reference is held by the first object to the second object. Other embodiments relate to agile objects. Agile objects called by context-bound objects execute in the contexts of their callers. The context of a calling context-bound object becomes the context of an agile object for calling of the agile object by the calling context-bound object. Direct reference to the agile object by the context-bound object is thus permitted.

US Patent:

8296528, Oct 23, 2012

Filed:

Nov 3, 2008

Appl. No.:

12/264062

Inventors:

Vincent J. Zimmer - Federal Way WA, US
Scott H. Robinson - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 12/08
G06F 12/14
G06F 9/24

US Classification:

711152, 711129, 711163, 713 1, 726 27

Abstract:

Methods and systems for performing microcode patching are presented. In one embodiment, a data processing system comprises a cache memory and a processor. The cache memory comprises a plurality of cache sections. The processor sequesters one or more cache sections of the cache memory and stores processor microcode therein. In one embodiment, the processor executes the microcode in the one or more cache sections.

US Patent:

8522066, Aug 27, 2013

Filed:

Jun 25, 2010

Appl. No.:

12/823343

Inventors:

Vincent J. Zimmer - Federal Way WA, US
Bin Xing - Hillsboro OR, US
Scott H. Robinson - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1/10
G06F 1/12

US Classification:

713503

Abstract:

In one embodiment, a semiconductor integrated code (SIC) may be provided in a binary format by a processor manufacturer. This SIC may include platform independent code of the processor manufacturer. Such code may include embedded processor logic to initialize the processor and at least one link that couples the processor to a memory, and embedded memory logic to initialize the memory. Other embodiments are described and claimed.

US Patent:

20140013095, Jan 9, 2014

Filed:

Jul 5, 2013

Appl. No.:

13/935767

Inventors:

Vincent J. Zimmer - Federal Way WA, US
Bin Xing - Hillsboro OR, US
Scott H. Robinson - Portland OR, US

International Classification:

G06F 9/44

US Classification:

713 2

Abstract:

In one embodiment, a semiconductor integrated code (SIC) may be provided in a binary format by a processor manufacturer. This SIC may include platform independent code of the processor manufacturer. Such code may include embedded processor logic to initialize the processor and at least one link that couples the processor to a memory, and embedded memory logic to initialize the memory. Other embodiments are described and claimed.