Seoung S Lee from Menlo Park, CA, age 52

Method And System For Improving Serial Port Memory Communication Latency And Reliability
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US Patent:

8407427, Mar 26, 2013
Filed:

Oct 23, 2009
Appl. No.:

12/605134
Inventors:

Alan Ruberg - Menlo Park CA, US
Seoung Jeong Lee - Santa Clara CA, US
Hyung Rok Lee - Sunnyvale CA, US
Daeyun Shim - Saratoga CA, US
Dongyun Lee - San Jose CA, US
Sungjoon Kim - Cupertino CA, US
Anu Murthy - Sunnyvale CA, US
Assignee:

Silicon Image, Inc. - Sunnyvale CA
International Classification:

G06F 12/00
G06F 13/00
G06F 13/28
US Classification:

711149, 711167, 36523005
Abstract:

A method, apparatus and system for reducing memory latency is disclosed. In one embodiment, data between a host computer system and a memory is communicated via a port or a group of ports at the memory over multiple time intervals, wherein the host computer is coupled to the memory. Further, a command associated with the data is communicated between the host computer system and the memory via the port or the group of ports over a single time interval.

Method And System For Improving Serial Port Memory Communication Latency And Reliability
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US Patent:

20130282991, Oct 24, 2013
Filed:

Mar 25, 2013
Appl. No.:

13/850147
Inventors:

Seoung Jeong Lee - Cupertino CA, US
Hyung Rok Lee - Sunnyvale CA, US
Daeyun Shim - Saratoga CA, US
Dongyun Lee - Sunnyvale CA, US
Sungjoon Kim - Cupertino CA, US
Anu Murthy - San Jose CA, US
International Classification:

G06F 13/16
G11C 7/10
US Classification:

711149
Abstract:

A method, apparatus and system for reducing memory latency is disclosed. In one embodiment, data between a host computer system and a memory is communicated via a port or a group of ports at the memory over multiple time intervals, wherein the host computer is coupled to the memory. Further, a command associated with the data is communicated between the host computer system and the memory via the port or the group of ports over a single time interval.