Shyam Sundar

age ~49

from Edwardsville, IL

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Also known as:

Murali Sundar
Sara H Colston
Sarah Colston
Shyam Sudar

Connected to:

Shyam Sundar Phones & Addresses

Edwardsville, IL
Los Altos, CA
758 Sweetbay Dr, Sunnyvale, CA 94086 • 4087730483
929 El Camino Real, Sunnyvale, CA 94087 • 4087730483
606 Arcadia Ter, Sunnyvale, CA 94085 • 4087730483
243 Buena Vista Ave, Sunnyvale, CA 94086 • 4087730483
3131 Homestead Rd, Santa Clara, CA 95051 • 4084238329
Cincinnati, OH
Milwaukee, WI
Fullerton, CA
243 Buena Vista Ave, Sunnyvale, CA 94086 • 4085291757

Work

Position:

Executive, Administrative, and Managerial Occupations

Education

Degree:

Associate degree or higher

Amazon

Metamaterial Loaded Antennas for Wireless Communication

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In day-to-day activities, portable wireless and mobile communication devices and technologies are becoming an integral part of human life. These systems need compact, high gain, high directivity and large bandwidth antennas to communicate voice, video, data, and multimedia information at high data r...

Author
Jayant Gajanan Joshi, Shyam Sundar Pattnaik

Binding
Paperback

Pages
284

Publisher
LAP LAMBERT Academic Publishing

ISBN #
3659226912

EAN Code
9783659226915

ISBN #
14

Labour Law And Governance Reforms in India: Some Critical Perspectives

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Labour regulation in India has engaged the attention of not only policy makers but also social actors, researchers and practioners. Policy measures have started rolling out from the state governments ever since Narendra Modi-led National Democratic Alliance (NDA) government assumed power in May 2014...

Author
K.R Shyam Sundar

Binding
Kindle Edition

Pages
292

Publisher
Synergy Books India

ISBN #
12

The Handbook of the Psychology of Communication Technology (Handbooks in Communication and Media)

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The Handbook of the Psychology of Communication Technology offers an unparalleled source for seminal and cutting-edge research on the psychological aspects of communicating with and via emergent media technologies, with leading scholars providing insights that advance our knowledge on human-technolo...

Author
S. Shyam Sundar

Binding
Hardcover

Pages
600

Publisher
Wiley-Blackwell

ISBN #
1118413369

EAN Code
9781118413364

ISBN #
11

Impact Of KVK On Knowledge And Adoption Of Scientific Fish Culture

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The book presents impact of KVK (Farm Science Centre) on knowledge and adoption of recommended practices of scientific fish culture among the farmers of Dakshin Dinajpur district, West Bengal, India. Krishi Vigyan Kendra (KVK) is a project of ICAR for testing and transfer of Agricultural technologie...

Author
Biswajit Goswami, Shyam Sundar Dana

Binding
Paperback

Pages
148

Publisher
LAP LAMBERT Academic Publishing

ISBN #
3659382558

EAN Code
9783659382550

ISBN #
8

Layayoga: The Definitive Guide to the Chakras and Kundalini

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The most comprehensive guide to chakra meditation and the ancient spiritual science of layayoga ever created. • One of the great works on yoga, available for the first time in the United States. • Full-color plates illustrate each chakra. With the growing interest in energy medicine in the West, t...

Author
Shyam Sundar Goswami

Binding
Paperback

Pages
368

Publisher
Inner Traditions

ISBN #
0892817666

EAN Code
9780892817665

ISBN #
1

HATHA YOGA - An Advanced Method of Physical Education and Concentration

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Author
Professor Shyam Sundar Goswami

Binding
Hardcover

Pages
221

Publisher
L. N. Fowler & Co.

ISBN #
10

[ Advanced Hatha Yoga: Classic Methods of Physical Education and Concentration [ ADVANCED HATHA YOGA: CLASSIC METHODS OF PHYSICAL EDUCATION AND CONCENTRATION ] By Goswami, Shyam Sundar ( Author )Aug-13-2012 Paperback

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Author
Shyam Sundar Goswami

Binding
Paperback

Publisher
Inner Traditions International

ISBN #
6

Jesus Christ and Yoga

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Author
Shyam Sundar Goswami

Binding
Hardcover

Pages
143

Publisher
L. N. Fowler & Co., Ltd.

ISBN #
5

Us Patents

Method And Apparatus For Signal Electromigration Analysis
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US Patent:

6954914, Oct 11, 2005
Filed:

Mar 24, 2003
Appl. No.:

10/395436
Inventors:

Shyam Sundar - Sunnyvale CA, US
Aveek Sarkar - Mountain View CA, US
Peter F. Lai - San Jose CA, US
Rambabu Pyapali - Cupertino CA, US
Teong Ming Cheah - Sunnyvale CA, US
Assignee:

Sun Microsystems, Inc. - Santa Clara CA
International Classification:

G06F017/50
US Classification:

716 5, 716 6, 716 2
Abstract:

The present application describes various embodiments of a method and an apparatus for determining electromigration risks for signal nets in integrated circuits. A model for each one of the global nets connecting various circuit blocks in an integrated circuit is created using circuit blocks' timing model and detailed standard parasitic format representation (DSPF) of each global net. The final layout of the integrated circuit is not necessary to determine the electromigration risks. The models can be generated during the early stages of the design cycle once the DSPF of the global nets is available.

Method And Apparatus For Power Consumption Analysis In Global Nets
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US Patent:

7007256, Feb 28, 2006
Filed:

Mar 6, 2003
Appl. No.:

10/383092
Inventors:

Aveek Sarkar - Mountain View CA, US
Shyam Sundar - Sunnyvale CA, US
Peter F. Lai - San Jose CA, US
Rambabu Pyapali - Cupertino CA, US
Assignee:

Sun Microsystems, Inc. - Santa Clara CA
International Classification:

G06F 9/45
G06F 9/455
G06F 17/50
US Classification:

716 6, 716 4, 716 11, 703 14, 703 19
Abstract:

The present invention describes a method and an apparatus for determining switching power consumption of global devices (e. g. , repeaters, flops or the like) in an integrated circuit design during high-level design phase after the global routing for the integrated circuit is available. The clock cycle is divided into various timing intervals and the timing reports are generated for each cycle to determine a time-domain staggered distribution of each device's switching activity within a given timing interval. Each device's switching activity is analyzed within the given timing interval (or segment thereof). The power consumption is determined for each device that switches in the given timing interval.

Partially Decoded Register Renamer
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US Patent:

7373486, May 13, 2008
Filed:

Aug 29, 2005
Appl. No.:

11/214193
Inventors:

Wei-Han Lien - San Jose CA, US
John K Yong - Sunnyvale CA, US
Shyam Sundar - Sunnyvale CA, US
Rajat Goel - Santa Clara CA, US
Assignee:

P.A. Semi, Inc. - Santa Clara CA
International Classification:

G06F 9/30
G06F 9/40
G06F 15/00
US Classification:

712218, 712216
Abstract:

In one embodiment, a renamer comprises a plurality of storage locations and compare circuitry. Each storage location is assigned to a respective renameable resource and is configured to store an identifier corresponding to a youngest instruction operation that writes the respective renameable resource. Coupled to receive an input representing one or more retiring instruction identifiers corresponding to instruction operations that are being retired, the compare circuitry is configured to detect a match between at least a first identifier in a first storage location and one of the retiring identifiers. An encoded form of the identifiers is logically divided into a plurality of fields, and the input comprises a first plurality of bit vectors. Each of the first plurality of bit vectors corresponds to a respective field and includes a bit position for each possible value of the respective field.

Aggregation Of Storage Elements Into Stations And Placement Of Same Into An Integrated Circuit Or Design
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US Patent:

20040049756, Mar 11, 2004
Filed:

Sep 10, 2002
Appl. No.:

10/238357
Inventors:

Sachin Chopra - Cupertino CA, US
Yu-Yen Mo - San Jose CA, US
Shyam Sundar - Sunnyvale CA, US
Peter Lai - San Jose CA, US
Venkat Podduturi - San Jose CA, US
Vishal Chopra - Cupertino CA, US
Assignee:

Sun Microsystems, Inc.
International Classification:

G06F017/50
US Classification:

716/010000, 716/008000
Abstract:

The present invention describes a method and apparatus for placing flops in a complex circuit design. Initially, the method calculates a physical range for every net that requires a flop, within which the flop can be placed satisfying the timing requirement. After the physical range is defined, the method groups these flops and determines a block where these grouped flops can be placed. Grouping these flops into one block (flop station) can preserve a compact layout for the design. The flops are then connected to appropriate nets.

Training Decode Unit For Previously-Detected Instruction Type
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US Patent:

20120079249, Mar 29, 2012
Filed:

Sep 28, 2010
Appl. No.:

12/892438
Inventors:

Wei-Han Lien - San Jose CA, US
Ian D. Kountanis - Santa Clara CA, US
Shyam Sundar - Sunnyvale CA, US
International Classification:

G06F 9/30
US Classification:

712212, 712E09016
Abstract:

In an embodiment, a decode unit includes multiple decoders configured to decode different types of instructions. One or more of the decoders may be complex decoders, and the decode unit may disable the complex decoders if an instruction of the corresponding type is not being decoded. In an embodiment, the decode unit may disable the complex decoders by data-gating the instruction into the decoder. The decode unit may also include a control unit that is configured to detect instructions of the type decoded by the complex decoders, and to enable the complex decoders and redirect the fetching in response to the detection. The decode unit may also record an indication of the instruction (e.g. the program counter address (PC) of the instruction) to more rapidly detect the instruction and prevent a redirect in subsequent fetches.

Reducing Power Consumption In A Processor
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US Patent:

20190286218, Sep 19, 2019
Filed:

Mar 25, 2019
Appl. No.:

16/363517
Inventors:

- Cupertino CA, US
Ronald P. Hall - Austin TX, US
Ramesh B. Gunna - San Jose CA, US
Ian D. Kountanis - Santa Clara CA, US
Shyam Sundar - Sunnyvale CA, US
André Seznec - Acigné, FR
International Classification:

G06F 1/3237
G06F 1/3296
G06F 1/3234
G06F 1/324
G06F 9/38
Abstract:

A processor includes a mechanism for disabling a memory array of a branch prediction unit. The processor may include a next fetch prediction unit that may include a number of entries. Each entry may correspond to a next instruction fetch group and may store an indication of whether or not the corresponding the next fetch group includes a conditional branch instruction. In response to an indication that the next fetch group does not include a conditional branch instruction, the fetch prediction unit may be configured to disable, in a next instruction execution cycle, the memory array of the branch prediction unit.

Zero Cycle Move Using Free List Counts
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US Patent:

20160026463, Jan 28, 2016
Filed:

Jul 28, 2014
Appl. No.:

14/444798
Inventors:

- Cupertino CA, US
Shyam Sundar - Sunnyvale CA, US
International Classification:

G06F 9/30
G06F 9/38
Abstract:

A system and method for reducing the latency of data move operations. A register rename unit within a processor determines whether a decoded move instruction qualifies for a zero cycle move operation. If so, control logic assigns a physical register identifier associated with a source operand of the move instruction to the destination operand of the move instruction. Additionally, the register rename unit marks the given move instruction to prevent it from proceeding in the processor pipeline. Further maintenance of the particular physical register identifier may be done by the register rename unit during commit of the given move instruction.

Undefined Instruction Recoding
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US Patent:

20160011875, Jan 14, 2016
Filed:

Jul 8, 2014
Appl. No.:

14/325981
Inventors:

- Cupertino CA, US
Shyam Sundar - Sunnyvale CA, US
International Classification:

G06F 9/38
G06F 12/08
Abstract:

A system and method for efficiently decoding and handling undefined instructions. A semiconductor chip predecodes instructions of a computer program. In response to determining a particular instruction is an undefined operation, the chip replaces an N-bit opcode in the particular instruction with an N-bit pattern different from the opcode. When instructions are fetched from an instruction cache, the corresponding opcodes are compared to the N-bit pattern. When a match is found, a trap may be set. The trap may later cause an exception handler subroutine for undefined operations to initiate execution.

Googleplus

Shyam Sundar

Work:

MINISTRY OF FINANCE - TAX INSPECTOR (2009)
INCOME TAX DEPARTMENT - INCOME TAX OFFICER (1984-2009)

Education:

MES HIGH SCHOOL - SSLC, APS COLLEGE OF ARTS AND SCIENCE - BSc, BMS COLLEGE OF LAW - LLB, ANNAMALAI UNIVERSITY - M L, Annamalai University - MBA, MADRAS UNIVERSITY - MA (ENGLISH LITT), MADRAS UNIVERSITY - M Ed (English)

Relationship:

Married

About:

Born and brought up in bangalore. Lived in South Bangalore all through. Worked for Income tax Department in Bangalore for 25 years. Now working in Muscat Oman for Ministry of Finance, Oman.

Tagline:

Friendly, homely and a family man

Bragging Rights:

Sentimental fool

Shyam Sundar

Work:

Aegis Ltd - Senior Manager Training (2009)
Accenture - Deputy Manager Capability Development (2007-2009)
Bharti Airtel - Assistant Manager Training (2006-2007)
Tata Group - Assistant Manager (2004-2006)
GE Capital - Universal Coach (2001-2004)
Leisure Property Management SIP Ltd - Holiday Consultant (2000-2001)

Education:

Xavier Labour Relations Institute - PGCBM, Andhra Loyola College - B.Com (Grad), DTEA Sr. Sec School - Commerce (12th)

Tagline:

A Person with passion to Live, Love and Celebrate!

Shyam Sundar

Work:

Not yet

Education:

B.S>S.Sikar - 6 to 12, UOR - BBA, University of Rajasthan - M.com

About:

Hii guyz my self shyam from sikar(Rajasthan).

Tagline:

Nice line:- Agar Aap ek pencil ban kar kisi ki khushiya NAHI likh sakte to....Koshish Karo ki Achha Rabber Ban k kisi k Gum mita Do....!

Shyam Sundar

Education:

CARMEL HIGH SCHOOL - LKG-SSC, HOLY TRINITY JUNIOR COLLEGE - INTERMEDIATE, UNIVERSITY ARTS & SCIENCE COLLEGE - BSC-BIOTECH, AURORA PG COLLEGE - MBA

Tagline:

Im still finding myself...

Shyam Sundar

Education:

SNMSSS, BS Mootha

About:

Hi Vanakkam Vandanam Namasthae!

Tagline:

Nothing is illegal until u get caught....!! mwahahahahaha........

Bragging Rights:

Survived Jayashree Yadav's VIII std terrorist attack!!

Shyam Sundar

Education:

IIMs Indian Institute of management,bagalore - Human resource, Jawahar navodaya vidyalaya ,purnea - Commerce, Bharathiar University - Hotel management

About:

Hiii ....i m shyam sundar nd m pursuing MBA 2nd year from IIMs Indian institute of management at bangalore

Bragging Rights:

Single

Shyam Sundar

Work:

Jet Airways - Performance Engineer (2008)

Education:

Indian Institute of Technology Madras - Aerospace Engg

Shyam Sundar

Work:

R.V.S coll of engg and tech - Student (2008-2012)

Education:

Mani Higher Secondary School

Tagline:

A man in search of an Identity

Youtube

Sa Re Ga Ma Pa July 20 '10 Apurva Gajjala - H...

Watch latest "Sa Re Ga Ma Pa" webisodes.

Category:

Entertainment
Uploaded:

21 Jul, 2010
Duration:

4m 31s

Shyam Sundar Banwari - Ustad Rashid Khan - Kr...

Shyam Sundar Banwari - Ustad Rashid Khan (Krishna Bhajan Jay Shree Ram...

Category:

Nonprofits & Activism
Uploaded:

20 Dec, 2009
Duration:

9m 1s

SRGMP7 Oct. 20, '09 He Shyam Sundar - Rutuja ...

In Season 7, hear the contestants showcase their prowess with the seve...

Category:

Entertainment
Uploaded:

21 Oct, 2009
Duration:

4m 1s

AGAR SHYAM SUNDAR KA SAHARA NA HOTA BY SWEET ...

THANKS FOR WATCHING KRISHNA CYBER CAFE YADAV MARKET GWALIOR !! THIS IS...

Category:

Entertainment
Uploaded:

17 Jul, 2009
Duration:

9m 41s

He Shyam Sundar

He Shyam Sundar. Original Singer: Kishori Amonkar

Category:

Music
Uploaded:

12 Jul, 2009
Duration:

4m 8s

S. Shyam Sundar on Social Media

In the sixth and final Research Unplugged discussion event of fall 200...

Category:

People & Blogs
Uploaded:

02 Dec, 2009
Duration:

9m 48s

News

AI fuels false claims after Charlie Kirk's death, CBS News analysis reveals

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produce results based on probability, which can make it challenging for them to provide accurate information in real time as events unfold, S. Shyam Sundar, a professor at Penn State University and the director of the university's Center for Socially Responsible Artificial Intelligence, told CBS News.
Date: Sep 12, 2025
Category: U.S.
Source: Google

Sci-fi films make us think real-life robots will be friendly says study

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"Increasingly people are talking about smart homes and heath care facilities and the roles robots could play to help the aging process," said S.Shyam Sundar, the communications professor at Penn State's Media Effects Research Laboratory who led the study.
Date: Mar 10, 2016
Category: Health
Source: Google

Swarm of rivals nipping at twitter's heels

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"Twitter is unsurpassed as far as text is concerned," said S Shyam Sundar, a director of the Media Effects Research Laboratory at Pennsylvania State University. "But you see a lot of other social media going into pictures and video, and in that sense, they are behind."
Date: Oct 07, 2013
Source: Google