Song L Lin

US Patent:

20210399757, Dec 23, 2021

Filed:

Jun 18, 2020

Appl. No.:

16/946360

Inventors:

- Norwood MA, US
Song Lin - Burlington MA, US

International Classification:

H04B 1/40
H03F 3/24
H03F 1/56

Abstract:

Apparatus and methods for radio frequency (RF) signal limiting are provided. In certain embodiments, an RF signal limiting system includes a cascade of a front limiter and a biased limiter. Additionally, the front limiter provides an initial amount of limiting to an RF signal, while the biased limiter serves to further limit the RF signal. The biased limiter is adaptively biased such that the amount of limiting provided to the RF signal increases in response to an increase in the RF signal level. Such an RF signal limiting system can be used in a variety of applications, including protecting an input of a low noise amplifier (LNA).

US Patent:

20210020589, Jan 21, 2021

Filed:

Jul 17, 2019

Appl. No.:

16/514444

Inventors:

- Co. Limerick, IE
Song Lin - Burlington MA, US
Xudong Wang - Colorado Springs CO, US

International Classification:

H01L 23/66
H01L 23/528
H01L 23/522
H01P 5/02
H01P 5/12
H03F 3/68
H03F 3/195

Abstract:

Coupled line structures for wideband applications are provided herein. In certain embodiments, a coupled line structure includes one transmission line that is segmented in a metal layer and another that is substantially continuous in the metal layer, thereby allowing tighter spacing and higher coupling between the transmission lines relative to what is achievable if both transmission lines were continuous. The high coupling in turn aids in achieving wide bandwidth.

US Patent:

20200168567, May 28, 2020

Filed:

Feb 21, 2019

Appl. No.:

16/282170

Inventors:

- Norwood MA, US
Song Lin - Burlington MA, US

International Classification:

H01L 23/66
H01P 3/08
H01P 3/00

Abstract:

An integrated circuit (IC) die having a first side and a second side opposite the first side is disclosed. The IC die can include a signal via through the IC die. The IC die can include processing circuitry. The IC die can include transition circuitry providing electrical communication between the processing circuitry and the signal via. The transition circuitry can comprise a first transmission line, a second transmission line, and a transition transmission line between the first and second transmission lines. In various embodiments, the first transmission line can comprise a microstrip (MS) line, and the second transmission line can comprise a grounded coplanar waveguide (CPW).

US Patent:

20190371746, Dec 5, 2019

Filed:

Feb 21, 2019

Appl. No.:

16/282148

Inventors:

- Norwood MA, US
Peter J. Katzin - Arlington MA, US
Song Lin - Burlington MA, US

International Classification:

H01L 23/66
H01L 23/48
H03H 7/38

Abstract:

An integrated circuit (IC) die is disclosed. The IC die can include a signal via extending through the IC die. The IC die can include a transmission line extending laterally within the IC die in a direction non-parallel to the signal via, the transmission line configured to transfer an electrical signal to the signal via. The IC die can include a matching circuit disposed between the transmission line and the signal via. The matching circuit can include inductance and capacitance matching circuitry to compensate for parasitic inductance and capacitance introduced by transition from the IC die to an underlying carrier.