Srinivas Podila

US Patent:

6981244, Dec 27, 2005

Filed:

Sep 8, 2000

Appl. No.:

09/657761

Inventors:

Pradeep K. Kathail - Sunnyvale CA, US
Haresh Kheskani - Saratoga CA, US
Srinivas Podila - Cupertino CA, US
Sebastien Marineau-Mes - Hull, CA

Assignee:

Cisco Technology, Inc. - San Jose CA

International Classification:

G06F009/44

US Classification:

717124

Abstract:

An operating system architecture and method which provides for transparent inheritance of memory management policies in data processing systems and enhanced memory management is disclosed. The operating system provides for a special “debug” process flag to be associated with debug and device management processes. When a source process transmits a message to a destination process, the operating system determines whether the source process is a debug process (i. e. , whether the source process contains a debug process flag indicator associated therewith). If the source process is a debug process, a debug process flag indicator is also associated with the destination process. The operating system also reserves a portion of the device's memory (a reserve memory pool) which is only allocated to special “debug” process when the non-reserved pool of memory is depleted.