Jacobi Medical Center Trauma Surgery 1400 Pelham Pkwy S RM 1213, Bronx, NY 10461 7189185590 (phone), 7189185593 (fax)
Education:
Medical School M S Ramaiah Med Coll, Bangalore Univ, Bangalore, Karnataka, India Graduated: 2001
Procedures:
Endarterectomy
Conditions:
Appendicitis Cholelethiasis or Cholecystitis
Languages:
English Spanish
Description:
Dr. Reddy graduated from the M S Ramaiah Med Coll, Bangalore Univ, Bangalore, Karnataka, India in 2001. He works in Bronx, NY and specializes in Traumatic Surgery and Surgical Critical Care. Dr. Reddy is affiliated with Jacobi Medical Center.
Dr. Reddy graduated from the Guntur Med Coll, Ntr Univ of Hlth Sci, Guntur, A P, India in 1990. He works in The Villages, FL and specializes in Internal Medicine. Dr. Reddy is affiliated with Florida Hospital Waterman, Leesburg Regional Medical Center and The Villages Regional Hospital.
Dr. Reddy graduated from the Northwestern University Feinberg School of Medicine in 1995. He works in Olympia Fields, IL and 1 other location and specializes in Interventional Cardiology and Cardiovascular Disease. Dr. Reddy is affiliated with Advocate BroMenn Medical Center, Community Hospital, Franciscan St James Health and Silver Cross Hospital.
Dr. Reddy graduated from the Kakatiya Med Coll, Vijayawada Univ Hlth Sci, Warangal, Ap, India in 1979. He works in Cleburne, TX and 1 other location and specializes in Psychiatry. Dr. Reddy is affiliated with John Peter Smith Health Network.
Mercy Internal Medicine Associates 2213 Franklin Ave FL 2, Toledo, OH 43620 4192512360 (phone), 4192512393 (fax)
Mercy St Vincent Medical Center Residency 2213 Cherry St, Toledo, OH 43608 4192514554 (phone), 4192516795 (fax)
Education:
Medical School Kempegowda Inst of Med Sci, Bangalore Univ, Bangalore, Karnataka Graduated: 2005
Languages:
English Spanish
Description:
Dr. Reddy graduated from the Kempegowda Inst of Med Sci, Bangalore Univ, Bangalore, Karnataka in 2005. He works in Toledo, OH and 1 other location and specializes in Internal Medicine. Dr. Reddy is affiliated with Mercy St Vincent Medical Center.
SSM St Clare Surgical Center 1055 Bowles Ave STE 100, Fenton, MO 63026 6362039700 (phone), 6362039779 (fax)
Education:
Medical School Osmania Med Coll, Ntr Univ of Hlth Sci, Hyderabad, Ap, India Graduated: 1987
Languages:
English
Description:
Dr. Reddy graduated from the Osmania Med Coll, Ntr Univ of Hlth Sci, Hyderabad, Ap, India in 1987. He works in Fenton, MO and specializes in Anesthesiology.
Wikipedia References
Srinivas Reddy
About:
Born:
Andhra Pradesh , India
Children:
two daughters and one son
Work:
Position:
Indian journalist
Education:
He is also secretary of Indian Journalists Union..
Apr 2012 to 2000 Sr. Informatica DeveloperThomson Reuters Newark, NJ Nov 2010 to Mar 2012 Sr. Informatica DeveloperThomson Reuters Rockville, MD May 2010 to Nov 2010 Sr. Informatica DeveloperUBS Weehawken, NJ Jun 2009 to May 2010 Informatica DeveloperThomson Reuters New York, NY Aug 2007 to Jun 2009 Informatica DeveloperAmerican Express Atlanta, GA Aug 2005 to Jul 2007 Data ModelerInformatica DeveloperBank of the West Rosemead, CA May 2004 to Aug 2005 Informatica Developer
Education:
JNTU Austin, TX 2001 to 2004 Bachelors of Technology in Computer ScienceJNTU Jersey City, NJ 2001 to 2003 Bachelor of technology in Computer Science
Oct 2011 to 2000 Senior Software EngineerHD Supply Solutions San Diego, CA Apr 2009 to Oct 2011 Senior Software EngineerNokia, Inc San Francisco, CA Aug 2007 to Nov 2008 Senior Software Engineer - Java Development ConsultantCharles Schwab Inc San Francisco, CA Jul 2001 to Jun 2007 Technical Lead & Java DeveloperCharles Schwab Inc San Francisco, CA Jan 2005 to Jun 2005 Senior Software Engineer - Java Development ConsultantSnapfish.com San Francisco, CA Jan 2000 to Mar 2001 Java Software Engineer3COM Corp Santa Clara, CA Mar 1998 to Dec 1999 Software Engineer - Programming ConsultantSage Consultants San Francisco, CA Aug 1996 to Mar 1998 Software Engineer - ConsultantLSI Logic Corp Milpitas, CA Jan 1993 to Aug 1996 Programmer Analyst
Education:
University Of Texas El Paso, TX Jan 1993 Master of Science in Manufacturing EngineeringBangalore University Bangalore, Karnataka Dec 1987 Bachelor of Science in Industrial Engineering
Srinivas T. Reddy - Fremont CA 94539 Ketan Zaveri - San Jose CA 95129 Christopher F. Lane - Campbell CA 95008 Andy L. Lee - San Jose CA 95131 Cameron R. McClintock - Mountain View CA 94043 Bruce B. Pedersen - San Jose CA 95136 Manuel Mejia - San Jose CA 95116 Richard G. Cliff - Milpitas CA 95116
International Classification:
G06F 738
US Classification:
326 41, 326 40, 326 39, 326 38
Abstract:
Programmable interconnection group arrangements for selectively interconnecting logic on a programmable logic device are provided. Interconnection groups may be programmed to route signals between the various conductors on the device, and to route signals from various logic regions on the device to the various conductors. The interconnection groups provide routing flexibility and efficiency without using excessive amounts of interconnection resources.
Redundancy Circuitry For Programmable Logic Devices With Interleaved Input Circuits
David E. Jefferson - San Jose CA Srinivas T. Reddy - Fremont CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
H03K 19173
US Classification:
326 38, 326 39, 326 41
Abstract:
Redundant circuitry is provided for a programmable logic device that uses an interleaved input multiplexer circuit arrangement. The programmable logic device has at least one row of logic regions and has multiple columns, each of which contains one of the interleaved input multiplexers and one of the logic regions. A set of conductors associated with the row of logic regions is used to convey signals between the logic regions. Each interleaved logic region distributes logic signals from the conductors in the row to two adjacent logic regions. Bypass circuitry is provided in each column for bypassing the interleaved input multiplexer and logic region in that column. If a defect is detected in a column during testing of the device, the manufacturer can repair the device using the bypass circuitry to bypass that column. Spare logic is provided to replace the circuitry lost when a defective column is bypassed.
Programmable Logic Device With Redundant Circuitry
Srinivas T. Reddy - Fremont CA Manuel Mejia - San Jose CA Andy L. Lee - San Jose CA Bruce B. Pedersen - San Jose CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
H03K 19003
US Classification:
326 10, 326 38, 326 39
Abstract:
A programmable logic device is provided that allows a redundant row of programmable logic to be shifted into place to repair the device when a defect is detected in a row of programmable logic on the device. The redundant row is shifted into place by routing programming data into the normal logic and the redundant logic while bypassing the row of logic containing the defect. Switching circuitry may be used to direct programming data into the serial inputs of various data registers that are then used to load the programming data into the device. The patterns of programmable connections that are made between programmable logic regions on the device and vertical and horizontal conductors also allow redundant logic to be shifted into place. Some connections between the logic and the horizontal and vertical conductors may be identical within a column to facilitate shifting. Other connections may only partially overlap between respective rows.
Srinivas T. Reddy - Santa Clara CA Anil Gupta - San Jose CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
H03K 1762
US Classification:
326105, 327408
Abstract:
A look-up table circuit implemented with MOS transistors that uses combinational logic to generate signals that enable the transistors. A circuit using 16 inputs and 4 select lines is disclosed. Two of the select lines are used as inputs to combinational logic including four NOR gates to generate enable signals for transistors in a third stage of the circuit. This produces a reduction in the propagation delay of a signal from the input to the output of the look-up table circuit.
Multifunction Memory Array In A Programmable Logic Device
Srinivas T. Reddy - Fremont CA Brian D. Johnson - Sunnyvale CA Christopher F. Lane - San Jose CA Ketan H. Zaveri - San Jose CA
Assignee:
Altera Corporation San Jose CA
International Classification:
H01L 2501
US Classification:
326 41, 326 38, 326 39
Abstract:
A logic array block (LAB) that is programmably selectively configurable for use as a multifunction memory array is provided. The LAB is configurable for operation in at least two modes: in a first mode, each logic element within the LAB is individually configurable to perform logic functions; in a second mode, the logic elements are collectively usable as a multifunction memory array. The multifunction memory array may be addressed on a LAB-wide basis with separate read and write addresses, such that it may be configured to implement a variety of memory schemes, including first-in-first-out (FIFO) memory and random access memory (RAM).
Richard G. Cliff - Milpitas CA Francis B. Heile - Santa Clara CA Joseph Huang - San Jose CA Christopher F. Lane - Campbell CA Fung Fung Lee - Milpitas CA Cameron McClintock - Mountain View CA David W. Mendel - Sunnyvale CA Ninh D. Ngo - San Jose CA Bruce B. Pedersen - San Jose CA Srinivas T. Reddy - Fremont CA Chiakang Sung - Milpitas CA Kerry Veenstra - San Jose CA Bonnie I. Wang - Cupertino CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
G06F 738
US Classification:
326 41, 326 39
Abstract:
A programmable logic array integrated circuit device has a plurality of regions of programmable logic disposed on the device in a two-dimensional array of intersecting rows and columns of regions. The output signals of several regions share a group of drivers for applying region output signals to interconnection conductors that convey signals between regions. This conserves driver resources and increases signal routing flexibility. Various approaches can be used for configuring the interconnection conductors to also conserve interconnection conductor resources. Logic regions may be used to directly drive specific input/output cells, thereby simplifying signal routing to the I/O cells and also possibly simplifying the structure of the I/O cells (e. g. , by allowing certain I/O cell functions to be performed in the associated logic region). Region output signal routing flexibility may also be enhanced to facilitate simultaneous performance of combinatorial logic and a separate âlonely registerâ function in modules of the regions.
Fast Signal Conductor Networks For Programmable Logic Devices
Christopher F. Lane - Campbell CA Srinivas T. Reddy - Fremont CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
A03K 19177
US Classification:
326 41, 326 38
Abstract:
A programmable logic integrated circuit device has a plurality of areas of programmable logic disposed on the device in a two-dimensional array of intersecting rows and columns of such areas. A so-called âfast conductorâ network is provided on the device for rapidly and efficiently distributing a relatively small number of signals to substantially any logic area on the device. The fast conductor network has several main conductors that substantially bisect the array in one direction (e. g. , by extending parallel to the column axis). Some main conductors can carry signals from off the device. Other main conductors can carry signals generated on the device. The network further includes secondary conductors that extend transverse to the main conductors (e. g. , along each row of logic areas). Programmable logic connectors are provided for selectively applying signals from the main conductors to the secondary conductors and from the secondary conductors to the logic areas.
Techniques For Programming Programmable Logic Array Devices
Richard G. Cliff - Milpitas CA Srinivas T. Reddy - Fremont CA Kerry Veenstra - San Jose CA Andreas Papaliolios - Sunnyvale CA Chiakang Sung - Milpitas CA Richard Shaw Terrill - Santa Clara CA Rina Raman - Los Altos CA Robert Richard Noel Bielby - Pleasonton CA
Programmable logic array devices are programmed from programming devices in networks that facilitate programming any number of such logic devices with programs of any size or complexity. The source of programming data and control may be a microprocessor or one or more serial EPROMs, one EPROM being equipped with a clock circuit. Several parallel data streams may be used to speed up the programming operation. A clock circuit with a programmably variable speed may be provided to facilitate programming logic devices with different speed characteristics. The programming protocol may include an acknowledgment from the logic device(s) to the programming data source after each programming data transmission so that the source can automatically transmit programming data at the speed at which the logic device is able to accept that data.
Name / Title
Company / Classification
Phones & Addresses
Sridevi Reddy Physical Medicine And Rehabilitation Services
Stirling Jerold Offices and Clinics of Doctors of Medicine
2160 S 1St Ave, Broadview, IL 60153
Srinivas Reddy Business Developement Manager
Aita Consulting Services Business Consulting Services
6 Julie Ct, East Millstone, NJ 08873
Srinivas Reddy Senior Project Manager
Intelligroup, Inc. Business Services
499 Thornall St Ste 1101, Edison, NJ 08837
Srinivas Reddy Managing Director Alliance India
Alliance Consulting Group Associates Inc Business Consulting Services
118 W 22Nd St, New York, NY 10011
Srinivas G. Reddy Principal, Managing
Harvest Plaza, LLC Business Services at Non-Commercial Site · Nonclassifiable Establishments · Investments
28100 Laura Ct, Los Altos, CA 94022
Srinivas Reddy Physical Medicine And Rehabilitation Services
Stirling Jerold Nonclassifiable Establishments · Offices and Clinics of Medical Doctors
2160 S 1 Ave, Broadview, IL 60153 7082163282, 7082169000, 7735083847
Interestingly, luck has smiled on P. Srinivas Reddy, Jogu Ramanna, P.Mahender Reddy and T. Rajaiah, who joined TRS very recently. The first three are former TDP MLAs while Dr. Rajaiah was from the Congress. Induction of Mr. Mahender Reddy, who switched his loyalty days ahead of the general elections
Sircilla constituency) and nephew T. Harish Rao (Siddipet) were accommodated in the cabinet. The other cabinet ministers who were sworn in were: Mohammed Mahmood Ali, Dr. Rajaiah, N. Narsimha Reddy, P. Srinivas Reddy, Eatela Rajendar, T. Padma Rao, P. Mahendar Reddy, Jogu Ramanna and Jagadish Reddy.
Date: Jun 02, 2014
Source: Google
Indian mining tycoons arrested in corruption crackdown
Central Bureau of Investigation agents have arrested Gali Janardhana Reddy, owner of Obulapuram Mining Corporation and a former minister in Karnataka state, and his brother-in-law Srinivas Reddy, the company's managing director. The men face charges of conspiracy, forgery and violation of mining la
Deccan College - BE, Sri saiViswabharathi Jr College - XII, Simhapuri Public School - X
Tagline:
I
Srinivas Reddy
Work:
Deere & Company - Senior Engineer I (2010)
Education:
International Institute of Information Technology, Pune - Embedded Systems, Regency Institute of Technology - Electrical & Electronics, Vignan Vidyalayam - Maths Physics & Chemistry
About:
I'm totally a fun lovin guy and takes my life serious at times!!!!
Tagline:
Keep Things Simple and Enjoy each n every moment of your life!!! But definitely think about your career at times :)
Srinivas Reddy
Education:
St johns high school - Ssc, Intermediate - Intermediate-MPC, JITS - Btech in IT, University of East London - Masters in IT