Stephen Gary Lyon

US Patent:

20130087766, Apr 11, 2013

Filed:

Oct 4, 2012

Appl. No.:

13/645291

Inventors:

THE REGENTS OF THE UNIVERSITY OF CALIF - Oakland CA, US
Cheuk Chi LO - Berkeley CA, US
Christoph WEIS - Berkeley CA, US
Stephen LYON - Cranbury NJ, US
Alexei TYRYSHKIN - Yardley PA, US
Jeffrey BOKOR - Oakland CA, US

Assignee:

THE REGENTS OF THE UNIVERSITY OF CALIFORNIA - Oakland CA

International Classification:

H01L 29/06
H01L 21/02

US Classification:

257 31, 438 2, 257E29005, 257E21002

Abstract:

A quantum bit computing architecture includes a plurality of single spin memory donor atoms embedded in a semiconductor layer, a plurality of quantum dots arranged with the semiconductor layer and aligned with the donor atoms, wherein a first voltage applied across at least one pair of the aligned quantum dot and donor atom controls a donor-quantum dot coupling. A method of performing quantum computing in a scalable architecture quantum computing apparatus includes arranging a pattern of single spin memory donor atoms in a semiconductor layer, forming a plurality of quantum dots arranged with the semiconductor layer and aligned with the donor atoms, applying a first voltage across at least one aligned pair of a quantum dot and donor atom to control a donor-quantum dot coupling, and applying a second voltage between one or more quantum dots to control a Heisenberg exchange J coupling between quantum dots and to cause transport of a single spin polarized electron between quantum dots.