Stephen R Magee

US Patent:

56153279, Mar 25, 1997

Filed:

Apr 4, 1995

Appl. No.:

8/416482

Inventors:

Stephen C. Magee - San Jose CA
Peter H. Lipman - Cupertino CA

Assignee:

Amdahl Corporation - Sunnyvale CA

International Classification:

G06F 1100
G06F 9455

US Classification:

3951821

Abstract:

A multiprocessor (MP) computer sytem which allows target CPU(s) to continue processing instructions while other target CPU(s) are processing instructions of emulation code to reach their end of a Domain Unit of Operation before synchronization. A two-level MP sync is used since the target CPUs must be in between units of operation when the updates occur since a unit of operation can be one instruction or it can be many instructions that together emulate one instruction. Two level MP sync allows CPUs that are going to be serialized to continue to process single instructions (no emulation code) while other target CPUs are in emulation mode.

US Patent:

56030088, Feb 11, 1997

Filed:

Nov 10, 1994

Appl. No.:

8/337133

Inventors:

Ronald N. Hilton - Cupertino CA
Stephen C. Magee - San Jose CA
Jeffrey L. Baker - Milpitas CA

Assignee:

Amdahl Corporation - Sunnyvale CA

International Classification:

G06F 1210
G06F 1214

US Classification:

395491

Abstract:

A storage unit for a data processing system includes a cache data buffer, a cache tag, and a translation lookaside buffer (TLB). Storage keys are maintained in the TLB with a separate valid bit, which allows a valid translation to be stored upon completion of a translation, even though the key is not yet available. With a valid translation in the TLB entry available, the requesting port is then able to send off a move in request to mainstore right away in parallel with a key request from the translator to the mainstore key array. In the typical case, the key will be returned several cycles ahead of the data, allowing it to be written into the TLB entry and validated in time for the move in data to be successfully bypassed to the requestor as soon as it arrives.