Stephen J Reid

US Patent:

8319523, Nov 27, 2012

Filed:

Jun 23, 2010

Appl. No.:

12/821730

Inventors:

Stephen R. Reid - Ayer MA, US
David J. Katz - Andover MA, US

Assignee:

Raytheon Company - Waltham MA

International Classification:

H03K 19/00
H03K 19/094
H03K 3/356

US Classification:

326 93, 326 83, 327208

Abstract:

In one aspect, an integrated circuit (IC) system includes a receiver IC configured to receive a first clock signal and includes a feedback circuit to provide a feedback signal to a driver IC. The system also includes the driver IC configured to receive a second clock signal and includes a phase selection circuit configured to provide a phase selection signal to the receiver IC based on the feedback signal. The phase selection signal controls the data received by the receiver IC by adjusting the first clock signal.

US Patent:

8503593, Aug 6, 2013

Filed:

Jun 23, 2010

Appl. No.:

12/821737

Inventors:

David J. Katz - Andover MA, US
Stephen R. Reid - Ayer MA, US

Assignee:

Raytheon Company - Waltham MA

International Classification:

H04L 7/00

US Classification:

375371, 375316, 370516, 702106

Abstract:

In one aspect, an integrated circuit (IC) system includes a receiver IC configured to receive a first clock signal and includes a feedback circuit configured to provide a feedback signal to a driver IC. The IC system also includes the driver IC configured to receive a second clock signal and includes a waveform generator configured to provide synthesized waveforms from DC to K-band, a serializer/deserializer (SERDES) to receive data from the waveform generator and to provide the signal to the receiver IC and a phase selection circuit to provide a phase selection signal to the first integrated circuit based on the feedback signal. The phase selection signal calibrates the signal from the SERDES and provides phase correction to the SERDES.