Stephen G Strong

US Patent:

6941482, Sep 6, 2005

Filed:

Sep 10, 2002

Appl. No.:

10/238358

Inventors:

Stephen Strong - Fremont CA, US

Assignee:

Finisar Corporation - Sunnyvale CA

International Classification:

G06F015/173

US Classification:

713400, 714712, 714 45, 714 37, 713178, 439701, 370253, 370252

Abstract:

Systems and methods for synchronizing time stamp counters of ports in a domain and for starting, stopping and triggering the ports in the domain at substantially the same time. A master box is connected with at least one slave box and the ports on the connected boxes are logically grouped in domains. The master box generates a clock signal that is adjusted and distributed to the slave boxes. The clock signal thus received by the slave boxes drives a clock multiplier that in turn drives the time stamp counters of the ports in the domains across the respective boxes. The time stamps of ports within a domain are synchronized because they are driven by the clock signal from the master box. The ports in a particular domain can be started, stopped and triggered using control signals that are similarly distributed from the master box to the slave boxes.

US Patent:

7486625, Feb 3, 2009

Filed:

Jul 1, 2005

Appl. No.:

11/174032

Inventors:

Eldad Matityahu - Palo Alto CA, US
Robert E. Shaw - Los Gatos CA, US
Stephen H. Strong - Fremont CA, US

Assignee:

Net Optics, Inc. - Sunnyvale CA

International Classification:

H04J 3/14

US Classification:

370242, 370248

Abstract:

A communications network tap with a link fault detector, comprises a first terminal and a second terminal adapted to couple the tap in-line in the network and communicate data packets with network devices. A tap circuit is coupled to the first terminal and second terminal and configured to provide data packets to a monitor terminal. A link fault circuit coupled to the first terminal and second terminal and when a failure is detected in the first terminal, to cause a failure on the second terminal. Advantages of the invention include ensuring the integrity of the network by alerting network devices of fault conditions.

US Patent:

7599301, Oct 6, 2009

Filed:

Jul 1, 2005

Appl. No.:

11/174238

Inventors:

Eldad Matityahu - Palo Alto CA, US
Robert E. Shaw - Los Gatos CA, US
Stephen H. Strong - Fremont CA, US

Assignee:

Net Optics, Inc. - Santa Clara CA

International Classification:

H04J 3/14
G06F 11/00
G08C 25/00

US Classification:

370242, 370248, 714 48, 714703, 714799, 714715

Abstract:

A communications network tap, comprises a first terminal and a second terminal adapted to couple the tap in-line in the network and communicate data packets with network devices. A heartbeat generator is configured to generate a heartbeat signal, and a heartbeat insert circuit coupled to the first terminal and the heartbeat generator and configured to insert the heartbeat signal into data packets. A third terminal is coupled to the heartbeat insert circuit and adapted to couple the tap to a network monitor and communicate data packets with network monitor. A heartbeat remove circuit is coupled to the third terminal and configured to receive data packets from a network monitor and remove the heartbeat signal from the data packets. A heartbeat detector coupled to the heartbeat remove circuit and configured to detect whether the data packets include the heartbeat signal, and if not, to generate an alarm signal. A switch is coupled to the second terminal and configured to transmit data packets onto the network.

US Patent:

7760859, Jul 20, 2010

Filed:

Mar 7, 2006

Appl. No.:

11/370487

Inventors:

Eldad Matityahu - Palo Alto CA, US
Bob Shaw - Los Gatos CA, US
Xiaochun Liu - Pleasanton CA, US
Stephen Strong - Fremont CA, US

Assignee:

Net Optics, Inc. - Santa Clara CA

International Classification:

H04M 1/24
H04M 3/08
H04M 3/22

US Classification:

379 2206, 379 291, 379 3201, 714 39, 714 43

Abstract:

Intelligent network tap port aggregators for use in monitoring a network and methods for use therein are presented including: a number of device interface terminals for receiving network feeds; a tap structure coupled with device interface terminals, the tap structure configured to monitor the second network feeds and to aggregate the network feeds into an aggregated network feed; a monitor interface terminal coupled to the tap structure for providing the aggregated network feed to a network monitor; and a display coupled to the tap structure and configured to display selected network parameters corresponding to the network feeds. In some embodiments, the intelligent network tap port aggregator also includes: a network controller coupled with the tap structure for providing communication between the tap structure and a number of managing devices; and a managing device interface coupled with the network controller for providing Internet access to the network controller.

US Patent:

7827248, Nov 2, 2010

Filed:

Jun 14, 2004

Appl. No.:

10/868631

Inventors:

Randy Oyadomari - San Jose CA, US
George Bullis - Glendora CA, US
Ken Hornyak - San Jose CA, US
Scott Baxter - Menlo Park CA, US
Stephen Strong - Fremont CA, US
Doug Durham - Sunnyvale CA, US

International Classification:

G06F 13/00

US Classification:

709208, 709214, 709224, 715736

Abstract:

Multi-chassis systems determine their topology and self-organize through a discovery process. The systems include one or more chassis, each with individual blades and ports, which are serially chained together. When the discovery process is initiated, chassis identification data in buffers in each chassis is propagated to adjacent chassis and is then used to initiate communication via a network connection. Once the chassis are able to communicate via the network connection, at least one chassis in the system receives the chassis identification data of each chassis and can thereby identify each chassis. The chain is then divided into one or more sync-groups and master and slave chassis are designated. Each sync-group is configured to ignore data from other sync-groups. Domains are also configured from sets of ports within each sync-group.

US Patent:

8068340, Nov 29, 2011

Filed:

Jun 26, 2009

Appl. No.:

12/492326

Inventors:

Tri Luong Nguyen - San Jose CA, US
Ankur Singla - San Jose CA, US
Hogan Lew - Sunnyvale CA, US
Stephen Strong - Fremont CA, US

Assignee:

Juniper Networks, Inc. - Sunnyvale CA

International Classification:

H05K 7/20
F04D 29/54
H05K 5/00

US Classification:

361695, 36167948, 415206, 4152191, 165 803, 454184, 174547, 363141, 417360

Abstract:

A reversible fan tray device is provided for a power supply unit. The fan tray device includes a mounting panel to be removably mounted to the power supply, a fan unit secured to the mounting panel to provide airflow through the electronic device, and an interconnection board secured to the mounting panel to provide an electrical connection between the fan unit and the power supply unit. The mounting panel can be positioned in either of two orientations, the first orientation to draw external air into the power supply unit and the second orientation to force internal air out of the power supply unit. The interconnection board mates with a connector on the power supply unit when the fan tray cassette is in either of the two orientations. The interconnection board provides an airflow direction indication to the power supply unit for an existing orientation of the two orientations.

US Patent:

8266271, Sep 11, 2012

Filed:

Jun 30, 2004

Appl. No.:

10/881620

Inventors:

Randy Oyadomari - San Jose CA, US
Stephen Strong - Fremont CA, US

Assignee:

JDS Uniphase Corporation - Milpitas CA

International Classification:

G06F 15/173

US Classification:

709224, 709223, 709228, 709248

Abstract:

Protocol analyzers systems and methods coordinate the capture of network data of interest across multiple chassis. Each chassis has individual blades with accompanying ports and is serially connected to other chassis in the system. Selected ports from each chassis are configured in domains that can be spread across the serially connected chassis and used in coordination to capture network data of interest. A serial protocol containing control signals is used to transmit run, stop, and trigger data between the serially connected chassis and thereby coordinate the activity of ports within each domain. Through the use of the serial protocol the number of wires connecting adjacent chassis is minimized and each of the blades in the multi-chassis systems can be synchronously started, stopped, and triggered at the same time to synchronously capture the network data of interest.

US Patent:

8320242, Nov 27, 2012

Filed:

Jul 1, 2005

Appl. No.:

11/174033

Inventors:

Eldad Matityahu - Palo Alto CA, US
Robert E. Shaw - Los Gatos CA, US
Stephen H. Strong - Fremont CA, US
Dennis A. Carpio - San Jose CA, US

Assignee:

Net Optics, Inc. - Santa Clara CA

International Classification:

G01R 31/08
H04B 1/56
G06F 15/173
G06F 15/16

US Classification:

370230, 370235, 370276, 709224, 709232

Abstract:

An active response network tap for use in monitoring a network comprises a first device interface terminal, a second device interface terminal, a first monitor interface terminal, and a second monitor interface terminal. A tap structure is coupled to the first device interface terminal, second device interface terminal, first monitor interface terminal and second monitor interface terminal. A memory is coupled to the tap structure and configured to store data. In one aspect, the tap structure is configured to communicate full-duplex traffic between the tap structure and a monitor device coupled to a monitor interface terminal. In another aspect, the tap structure is configured to insert data from a monitor coupled to the first monitor interface into the traffic between the first device and the second device. Advantages of the invention include the ability to provide monitor access to a network while also supporting communication with other network devices.